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  • The algorithm ID3 (Quinlan) uses the method top-down induction of decision trees. given a set of cla

    The algorithm ID3 (Quinlan) uses the method top-down induction of decision trees. given a set of classified examples a decision tree is induced, biased by the information gain measure, which heuristically leads to small trees. The examples are given in attribute-value representation. The set of possible classes is finite. Only tests, that split the set of instances of the underlying example languages depending on the value of a single attribute are supported.

    標(biāo)簽: algorithm induction decision top-down

    上傳時(shí)間: 2017-08-20

    上傳用戶:hzy5825468

  • given a graph G = (V, E), where every edge e has a nonnegative weight w(e), and a source vertex s in

    given a graph G = (V, E), where every edge e has a nonnegative weight w(e), and a source vertex s in V, find the shortest path from s to every other vertex

    標(biāo)簽: nonnegative weight source vertex

    上傳時(shí)間: 2014-01-10

    上傳用戶:xuan‘nian

  • FIle to make auto calls and broadcast the auto converted gsm file to the given number through voip

    FIle to make auto calls and broadcast the auto converted gsm file to the given number through voip

    標(biāo)簽: auto broadcast converted the

    上傳時(shí)間: 2013-12-19

    上傳用戶:yzhl1988

  • This is the Ready project caller Id based on the Atmel Chip 8051... PCB layout is also given in this

    This is the Ready project caller Id based on the Atmel Chip 8051... PCB layout is also given in this file

    標(biāo)簽: the project caller layout

    上傳時(shí)間: 2017-08-29

    上傳用戶:杜瑩12345

  • this application was developed in visual c# to draw the sequence of the data given by Lagrange Inter

    this application was developed in visual c# to draw the sequence of the data given by Lagrange Interpolation algorithm

    標(biāo)簽: application developed the Lagrange

    上傳時(shí)間: 2013-12-24

    上傳用戶:dreamboy36

  • This brief introduce a kind of the framework construction to materialize the system. And an example

    This brief introduce a kind of the framework construction to materialize the system. And an example was given with the discussion on the performence.

    標(biāo)簽: construction materialize introduce framework

    上傳時(shí)間: 2013-08-17

    上傳用戶:ysystc699

  • 電臺(tái)維修模擬訓(xùn)練系統(tǒng)設(shè)計(jì)方法研究

    Methods for designing a maintenance simulation training system for certain kind of radio are introduced. Fault modeling method is used to establish the fault database. The system sets up some typical failures, follow the prompts trainers can locate the fault source and confirm the type to accomplish corresponding fault maintenance training. A training evaluation means is given to examining and evaluating the training performance. The system intuitively and vividly shows the fault maintenance process, it can not only be used in teaching, but also in daily maintenance training to efficiently improve the maintenance operation level. Graphical programming language LabVIEW is used to develop the system platform.

    標(biāo)簽: 電臺(tái)維修 模擬訓(xùn)練 方法研究 系統(tǒng)設(shè)計(jì)

    上傳時(shí)間: 2013-11-19

    上傳用戶:3294322651

  • 加載,感應(yīng)DAC應(yīng)用

    Abstract: This article discusses application circuits for Maxim force/sense digital-to-analog converters (DACs). Applications include:selectable fixed-gain DAC, programmable gain DAC, photodiode bias control, amperometric sensor control, digitally programmablecurrent source, Kelvin load sensing, temperature sensing, and high current DAC output. A brief description of the various DAC outputconfigurations is also given.

    標(biāo)簽: DAC

    上傳時(shí)間: 2013-11-04

    上傳用戶:youmo81

  • 射頻集成電路設(shè)計(jì)John Rogers(Radio Freq

    Radio Frequency Integrated Circuit Design I enjoyed reading this book for a number of reasons. One reason is that itaddresses high-speed analog design in the context of microwave issues. This isan advanced-level book, which should follow courses in basic circuits andtransmission lines. Most analog integrated circuit designers in the past workedon applications at low enough frequency that microwave issues did not arise.As a consequence, they were adept at lumped parameter circuits and often notcomfortable with circuits where waves travel in space. However, in order todesign radio frequency (RF) communications integrated circuits (IC) in thegigahertz range, one must deal with transmission lines at chip interfaces andwhere interconnections on chip are far apart. Also, impedance matching isaddressed, which is a topic that arises most often in microwave circuits. In mycareer, there has been a gap in comprehension between analog low-frequencydesigners and microwave designers. Often, similar issues were dealt with in twodifferent languages. Although this book is more firmly based in lumped-elementanalog circuit design, it is nice to see that microwave knowledge is brought inwhere necessary.Too many analog circuit books in the past have concentrated first on thecircuit side rather than on basic theory behind their application in communications.The circuits usually used have evolved through experience, without asatisfying intellectual theme in describing them. Why a given circuit works bestcan be subtle, and often these circuits are chosen only through experience. Forthis reason, I am happy that the book begins first with topics that require anintellectual approach—noise, linearity and filtering, and technology issues. Iam particularly happy with how linearity is introduced (power series). In therest of the book it is then shown, with specific circuits and numerical examples,how linearity and noise issues arise.

    標(biāo)簽: Rogers Radio John Freq

    上傳時(shí)間: 2014-12-23

    上傳用戶:han_zh

  • pci e PCB設(shè)計(jì)規(guī)范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標(biāo)簽: pci PCB 設(shè)計(jì)規(guī)范

    上傳時(shí)間: 2013-10-15

    上傳用戶:busterman

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