Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel
conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a
simplified UTMI interface. Currently doesn t do any error checking in
the RX section [should probably check for bit unstuffing errors].
Otherwise complete and fully functional.
There is currently no test bench available. This core is very simple
and is proven in hardware. I see no point of writing a test bench at
this time.
VxWorks 6.6 BSP開發執導
This document describes, in general terms, the elements that make up a board
support package [BSP], the requirements for a VxWorks BSP, and the general
behavior of a BSP during the boot process. This document outlines the steps
needed to port an existing BSP to a new hardware platform or to write a new
VxWorks BSP for custom hardware using a reference BSP or template BSP as a
starting point. It provides hints and tips for debugging a BSP and solving common
BSP development problems. It also provides information on the BSP validation test
suite [BSP VTS] that is used to assess the functionality of a VxWorks BSP.
1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysis
2. fpga implemention of a median filter
3. fpga implementation of digital filters
4.hardware acceleration of edge detection algorithm on fpgas
5.implementation and evaluation of image processing algorithms on reconfigurable architecture using C-based hardware descriptive languages
6. implementing 2D median filter in fpgas
7.視頻圖像處理與分析的網絡資源
200-MHz ARM920T Processor
• 16-kbyte Instruction Cache
• 16-kbyte Data Cache
• Linux® , Microsoft® Windows® CE-enabled MMU
• 100-MHz System Bus
• MaverickCrunch™ Math Engine
• Floating Point, Integer, and Signal Processing
Instructions
• Optimized for digital music compression and
decompression algorithms.
• hardware interlocks allow in-line coding.
• MaverickKey™ IDs
• 32-bit Unique ID can be used for DRM-compliant
128-bit random ID.
• Integrated Peripheral Interfaces
• 32-bit SDRAM Interface
The driver supports both the 16F and 18F families. The trick is that the driver carefully emulates the hardware UART found in the PIC18F452 processor. This information has unfortunately misled some into thinking it does not work with the 16F family. During devlopment the driver was tested on a real PIC16F84A (as opposed to software emulation). To make sure nothing has been broken, I have just recompiled the code using SourceBoost 6.0 and it compiled without error.
A combined space鈥搕ime block coding (STBC) and eigen-space tracking
(EST) scheme in multiple-input-multiple-output systems is
proposed. It is proved that the STBC-EST is capable of shifting
hardware complexity from the receiver to the transmitter without
any bit error rate (BER) performance loss. A computation efficient
EST algorithm is also proposed, which makes the STBC-EST affordable.
Simulation results show that the STBC-EST with a modest
feedback requirement results in a negligible BER performance loss
compared with a dual system configuration.
The paper describes the concept and realization of the DOOCS control software for FPGAbased
TESLA cavity controller and simulator (SIMCON). It bases on universal software
components, created for laboratory purposes and used in MATLAB based control
environment. These modules have been recently adapted to the DOOCS environment to
ensure a unified software to hardware communication model. The presented solution can be
also used as a general platform for control algorithms development. The proposed interfaces
between MATLAB and DOOCS modules allow to check the developed algorithm in the
operation environment before implementation in the FPGA. As the examples two systems
have been presented.
Watermarking schemes evaluation
Abstract鈥擠igital watermarking has been presented as a solution to copy protection of multimedia objects and dozens of schemes and algorithms have been proposed. Two main problems seriously darken the future of this technology though.
Firstly, the large number of attacks and weaknesses which appear as fast as new algorithms are proposed, emphasizes the limits of this technology and in particu-lar the fact that it may not match users expectations.
Secondly, the requirements, tools and methodologies to assess the current technologies are almost non-existent. The lack of benchmarking of current algorithms is bla-tant. This confuses rights holders as well as software and hardware manufacturers and prevents them from using the solution appropriate to their needs. Indeed basing long-lived protection schemes on badly tested watermarking technology does not make sense.
