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ism-Transceiver

  • simple psk transceiver

    simple psk transceiver

    標(biāo)簽: transceiver simple psk

    上傳時(shí)間: 2013-12-10

    上傳用戶:朗朗乾坤

  • simple psk transceiver temp

    simple psk transceiver temp

    標(biāo)簽: transceiver simple temp psk

    上傳時(shí)間: 2017-06-20

    上傳用戶:Avoid98

  • This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPG

    This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.

    標(biāo)簽: programming transceiver document Stratix

    上傳時(shí)間: 2014-01-15

    上傳用戶:wuyuying

  • Interference generator for MSP430 experimenter´ s board and CC1101 transceiver. It´ s usef

    Interference generator for MSP430 experimenter´ s board and CC1101 transceiver. It´ s useful to check Frecuency Agility

    標(biāo)簽: acute Interference experimenter transceiver

    上傳時(shí)間: 2017-08-06

    上傳用戶:sammi

  • CEL’s ZIC2410 802.15.4 / ZigBee transceiver

    CEL’s ZIC2410 802.15.4 / ZigBee transceiver

    標(biāo)簽: transceiver ZigBee 2410 CEL

    上傳時(shí)間: 2013-12-21

    上傳用戶:xiaoxiang

  • Integrated Transceiver Modules for ZigBee/IEEE 802.15.4

    Integrated Transceiver Modules for ZigBee/IEEE 802.15.4

    標(biāo)簽: Transceiver Integrated Modules ZigBee

    上傳時(shí)間: 2017-09-18

    上傳用戶:lacsx

  • IA4421 通用ISM頻段FSK收發(fā)器 38頁 2.9M.pdf

    超聲,紅外,激光,無線,通訊相關(guān)專輯 183冊(cè) 1.48GIA4421 通用ISM頻段FSK收發(fā)器 38頁 2.9M.pdf

    標(biāo)簽:

    上傳時(shí)間: 2014-05-05

    上傳用戶:時(shí)代將軍

  • RF+Transceiver+Design

    The multiple-input multiple-output (MIMO) technique provides higher bit rates and better reliability in wireless systems. The efficient design of RF transceivers has a vital impact on the implementation of this technique. This first book is com- pletely devoted to RF transceiver design for MIMO communications. The book covers the most recent research in practical design and applications and can be an important resource for graduate students, wireless designers, and practical engineers.

    標(biāo)簽: Transceiver Design RF

    上傳時(shí)間: 2020-06-01

    上傳用戶:shancjb

  • Transceiver and System Design

    T his book covers basic communications theory and practical imple- mentation of transmitters and receivers. In so doing, I focus on dig- ital modulation, demodulation methods, probabilities, detection of digital signals, and spread spectrum system design and analysis. This book was written for those who want a good understanding of the basic prin- ciples of digital wireless communication systems, including spread spec- trum techniques. This book also provides a good intuitive and practical approach to digital communications. Therefore it is a valuable resource for anyoneinvolvedinwirelesscommunicationsandtransceiverdesignfordig- ital communications. The reader will gain a broad understanding of basic communication principles for transceiver design, digital communications, and spread spectrum, along with examples of many types of commercial and military data link systems.

    標(biāo)簽: Transceiver System Design

    上傳時(shí)間: 2020-06-01

    上傳用戶:shancjb

  • SATA協(xié)議分析及其FPGA實(shí)現(xiàn).rar

    并行總線PATA從設(shè)計(jì)至今已快20年歷史,如今它的缺陷已經(jīng)嚴(yán)重阻礙了系統(tǒng)性能的進(jìn)一步提高,已被串行ATA(Serial ATA)即SATA總線所取代。SATA作為新一代磁盤接口總線,采用點(diǎn)對(duì)點(diǎn)方式進(jìn)行數(shù)據(jù)傳輸,內(nèi)置數(shù)據(jù)/命令校驗(yàn)單元,支持熱插拔,具有150MB/s(SATA1.0)或300MB/s(SATA2.0)的傳輸速度。目前SATA已在存儲(chǔ)領(lǐng)域廣泛應(yīng)用,但國內(nèi)尚無獨(dú)立研發(fā)的面向FPGA的SATAIP CORE,在這樣的條件下設(shè)計(jì)面向FPGA應(yīng)用的SATA IP CORE具有重要的意義。 本論文對(duì)協(xié)議進(jìn)行了詳細(xì)的分析,建立了SATA IP CORE的層次結(jié)構(gòu),將設(shè)備端SATA IP CORE劃分成應(yīng)用層、傳輸層、鏈路層和物理層;介紹了實(shí)現(xiàn)該IPCORE所選擇的開發(fā)工具、開發(fā)語言和所選用的芯片;在此基礎(chǔ)上著重闡述協(xié)議IP CORE的設(shè)計(jì),并對(duì)各個(gè)部分的設(shè)計(jì)予以分別闡述,并編碼實(shí)現(xiàn);最后進(jìn)行綜合和測(cè)試。 采用FPGA集成硬核RocketIo MGT(RocketIo Multi-Gigabit Transceiver)實(shí)現(xiàn)了1.5Gbps的串行傳輸鏈路;設(shè)計(jì)滿足協(xié)議需求、適合FPGA設(shè)計(jì)的并行結(jié)構(gòu),實(shí)現(xiàn)了多狀態(tài)機(jī)的協(xié)同工作:在高速設(shè)計(jì)中,使用了流水線方法進(jìn)行并行設(shè)計(jì),以提高速度,考慮到系統(tǒng)不同部分復(fù)雜度的不同,設(shè)計(jì)采用部分流水線結(jié)構(gòu);采用在線邏輯分析儀Chipscope pro與SATA總線分析儀進(jìn)行片上調(diào)試與測(cè)試,使得調(diào)試工作方便快捷、測(cè)試數(shù)據(jù)準(zhǔn)確;嚴(yán)格按照SATA1.0a協(xié)議實(shí)現(xiàn)了SATA設(shè)備端IP CORE的設(shè)計(jì)。 最終測(cè)試數(shù)據(jù)表明,本論文設(shè)計(jì)的基于FPGA的SATA IP CORE滿足協(xié)議需求。設(shè)計(jì)中的SATA IP CORE具有使用方便、集成度高、成本低等優(yōu)點(diǎn),在固態(tài)電子硬盤SSD(Solid-State Disk)開發(fā)中應(yīng)用本設(shè)計(jì),將使開發(fā)變得方便快捷,更能夠適應(yīng)市場(chǎng)需求。

    標(biāo)簽: SATA FPGA 協(xié)議分析

    上傳時(shí)間: 2013-06-21

    上傳用戶:xzt

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