calculation of the autocorrelation peak sidelobe levels and corsscorrelation. CE sequence, frank autocorrelation, P4 sequence,
標(biāo)簽： corsscorrelation autocorrelation calculation sidelobe
上傳時(shí)間： 2013-12-21
上傳用戶：czl10052678
A program for computing energy levels, reaction matrix and radial wave functions in the coupled-channel hyperspherical adiabatic approach
標(biāo)簽： coupled-chan computing functions reaction
上傳時(shí)間： 2016-02-24
上傳用戶：英雄
E book help for Programming in Linux. It helps at all the levels.
標(biāo)簽： Programming levels Linux helps
上傳時(shí)間： 2013-12-14
上傳用戶：pompey
Board game with a very strong computer enemy and many different levels.
標(biāo)簽： different computer strong levels
上傳時(shí)間： 2013-12-19
上傳用戶：cmc_68289287
this version is only interesting for people that want to generate their own levels (need JDK to compile new level).
標(biāo)簽： interesting generate version levels
上傳時(shí)間： 2017-06-02
上傳用戶：tb_6877751
program to simulate tank levels
標(biāo)簽： simulate program levels tank
上傳時(shí)間： 2017-06-06
上傳用戶：Miyuki
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.
標(biāo)簽： Modelling Guide Navy VHDL
上傳時(shí)間： 2014-12-23
上傳用戶：xinhaoshan2016
The trend in ADCs and DACs is toward higher speeds and higher resolutions atreduced power levels. Modern data converters generally operate on ±5V (dualsupply) or +5V (single supply). In fact, many new converters operate on a single +3Vsupply. This trend has created a number of design and applications problems whichwere much less important in earlier data converters, where ±15V supplies and ±10Vinput ranges were the standard.
標(biāo)簽： ADC 信號調(diào)節(jié) 傳感器
上傳時(shí)間： 2013-11-16
上傳用戶：sjw920325
The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for high-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.
標(biāo)簽： 17600 MAX 數(shù)據(jù)資料
上傳時(shí)間： 2013-12-20
上傳用戶：zhangxin
Low power operation of electronic apparatus has becomeincreasingly desirable. Medical, remote data acquisition,power monitoring and other applications are good candidatesfor battery driven, low power operation. Micropoweranalog circuits for transducer-based signal conditioningpresent a special class of problems. Although micropowerICs are available, the interconnection of these devices toform a functioning micropower circuit requires care. (SeeBox Sections, “Some Guidelines for Micropower Designand an Example” and “Parasitic Effects of Test Equipmenton Micropower Circuits.”) In particular, trade-offs betweensignal levels and power dissipation become painful whenperformance in the 10-bit to 12-bit area is desirable.
標(biāo)簽： 信號調(diào)理 微電路
上傳時(shí)間： 2013-10-22
上傳用戶：rocketrevenge
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