FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development
標簽： Methodology Design Reuse FPGA
上傳時間： 2013-10-23
上傳用戶：旗魚旗魚
針對飛行模擬器座艙數據采集的復雜性，設計了一種基于以太網分布式的數據采集控制系統，該系統是RCM5700微處理器模塊上的以太網應用。在系統的基礎上具體討論了PoE技術的應用，在傳輸數據的網線上同時提供電流，提出并實現了一種包括輔助電源在內的完整可靠的PoE供電方案。設計采用美國國家半導體的LM5073和LM5576并根據不同的負載情況，進行穩定可靠的電壓轉換，以滿足數據采集電路的要求。實驗結果表明：該設計穩定可靠，滿足低于13 W的采集節點供電要求，提高了模擬器信號采集系統的通用性和標準化程度，避免了以往數據采集節點單獨繁瑣的電源設計。 Abstract: Aiming at the complexity of large avion simulation and controlling，the simulator cabin distribute data collecting and control system was designed. This system is the application of RCM5700 on Ethernet. Based on this system，PoE technique that makes Ethernet can also provide power were expounded with emphasis and included FAUX design the PoE resolution was realized. To achieve the requirement of this system，LM5073 and LM5576 were used to DC-DC switch. From the data of experiment，the design filled the requirement of power-need of node whose power was lower than 13W. The application of the technique can advance the degree of simulation data collections currency and standardization and avoid designing additional power system.
上傳時間： 2013-11-09
上傳用戶：xyipie
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上傳時間： 2013-10-24
上傳用戶：s藍莓汁
同步技術是跳頻通信系統的關鍵技術之一，尤其是在快速跳頻通信系統中，常規跳頻通信通過同步字頭攜帶相關碼的方法來實現同步，但對于快跳頻來說，由于是一跳或者多跳傳輸一個調制符號，難以攜帶相關碼。對此引入雙跳頻圖案方法，提出了一種適用于快速跳頻通信系統的同步方案。采用短碼攜帶同步信息，克服了快速跳頻難以攜帶相關碼的困難。分析了同步性能，仿真結果表明該方案同步時間短、虛警概率低、捕獲概率高，同步性能可靠。 Abstract: Synchronization is one of the key techniques to frequency-hopping communication system， especially in the fast frequency hopping communication system. In conventional frequency hopping communication systems， synchronization can be achieved by synchronization-head which can be used to carry the synchronization information， but for the fast frequency hopping， Because modulation symbol is transmitted by per hop or multi-hop， it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code， a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code， which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed， and simulation results show that the scheme has the advantages of shorter synchronization time， lower probability of false alarm， higher probability of capture and more reliable of synchronization.
上傳時間： 2013-11-23
上傳用戶：mpquest
本軟件是關于MAX338, MAX339的英文數據手冊：MAX338, MAX339 8通道/雙4通道、低泄漏、CMOS模擬多路復用器 The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in both directions. These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-standard DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.
上傳時間： 2013-11-12
上傳用戶：18711024007
It would not be an exaggeration to say that semiconductor devices have transformed humanlife. From computers to communications to internet and video games these devices and the technologies they have enabled have expanded human experience in a way that is unique in history. Semiconductor devices have exploited materials, physics and imaginative applications to spawn new lifestyles. Of course for the device engineer, in spite of the advances, the challenges of reaching higher frequency, lower power consumption, higher power generation etc.
上傳時間： 2013-10-28
上傳用戶：songnanhua
The super-junction structure, which has P-type pillar layers as shown left, realizes high withstand voltage and ON-resistance lower than the conventional theoretical limit of silicon.
上傳時間： 2014-12-31
上傳用戶：qwer0574
Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.
上傳時間： 2013-12-07
上傳用戶：bruce
FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development
標簽： Methodology Design Reuse FPGA
上傳時間： 2013-11-01
上傳用戶：shawvi
The power of programmability gives industrial automation designers a highly efficient， cost-effective alternative to traditional motor control units （MCUs）。 The parallel-processing power， fast computational speeds， and connectivity versatility of Xilinx® FPGAs can accelerate the implementation of advanced motor control algorithms such as Field Oriented Control （FOC）。 Additionally， Xilinx devices lower costs with greater on-chip integration of system components and shorten latencies with high-performance digital signal processing （DSP） that can tackle compute-intensive functions such as PID Controller， Clark/Park transforms， and Space Vector PWM. The Xilinx Spartan®-6 FPGA Motor Control Development Kit gives designers an ideal starting point for evaluating time-saving， proven， motor-control reference designs. The kit also shortens the process of developing custom control capabilities， with integrated peripheral functions （Ethernet， PowerLink， and PCI® Express）， a motor-control FPGA mezzanine card （FMC） with built-in Texas Instruments motor drivers and high-precision Delta-Sigma modulators， and prototyping support for evaluating alternative front-end circuitry.
上傳時間： 2013-10-28
上傳用戶：wujijunshi
