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methods

  • 87C576微控制器的在線編程

    The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.

    標(biāo)簽: 87C576 微控制器 編程

    上傳時(shí)間: 2013-10-21

    上傳用戶:xiaozhiqban

  • WP369可擴(kuò)展式處理平臺(tái)-各種嵌入式系統(tǒng)的理想解決方案

    WP369可擴(kuò)展式處理平臺(tái)-各種嵌入式系統(tǒng)的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標(biāo)簽: 369 WP 擴(kuò)展式 處理平臺(tái)

    上傳時(shí)間: 2013-10-22

    上傳用戶:685

  • 基于FPGA的光纖光柵解調(diào)系統(tǒng)的研究

     波長(zhǎng)信號(hào)的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵,基于現(xiàn)有的光纖光柵傳感器解調(diào)方法,提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法,此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng),并且通過(guò)引入雙匹配光柵有效地克服了雙值問(wèn)題同時(shí)擴(kuò)大了檢測(cè)范圍。分析了光纖光柵的測(cè)溫原理并給出了該方案軟硬件設(shè)計(jì),綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    標(biāo)簽: FPGA 光纖光柵 解調(diào)系統(tǒng)

    上傳時(shí)間: 2014-07-24

    上傳用戶:caiguoqing

  • 軌道交通系統(tǒng)中列車定位技術(shù)

       闡述了軌道交通列車定位技術(shù)。介紹了在軌道交通系統(tǒng)中列車定位技術(shù)的功能,國(guó)內(nèi)外軌道交通中主要采用的列車定位方法,重點(diǎn)論述了幾種主要定位技術(shù),并從定位精度、閉塞制式、維護(hù)投資成本、抗干擾等方面進(jìn)行分析比較。提出目前軌道交通定位技術(shù)應(yīng)綜合運(yùn)用,取長(zhǎng)補(bǔ)短,多種方法相互融合,才能滿足軌道交通中對(duì)安全可靠性的要求。 Abstract:  Rail train positioning technology is described. The paper introduces the funetions of the train positioning technology in the rail transit system, the main methods of train positioning do mestic and international rail, and focuses on several key methods, analyzes and compares from the positioning accuracy, block system, maintenance and investment cost, interference and so on, suggested that the current rail positioning technology should be integrated use of positioning method of meriging, learn from each other, to meet the reliability requirements of rail safety.

    標(biāo)簽: 軌道交通 列車 定位技術(shù)

    上傳時(shí)間: 2013-11-25

    上傳用戶:franktu

  • WP369可擴(kuò)展式處理平臺(tái)-各種嵌入式系統(tǒng)的理想解決方案

    WP369可擴(kuò)展式處理平臺(tái)-各種嵌入式系統(tǒng)的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標(biāo)簽: 369 WP 擴(kuò)展式 處理平臺(tái)

    上傳時(shí)間: 2013-10-18

    上傳用戶:cursor

  • 基于FPGA的光纖光柵解調(diào)系統(tǒng)的研究

     波長(zhǎng)信號(hào)的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵,基于現(xiàn)有的光纖光柵傳感器解調(diào)方法,提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法,此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng),并且通過(guò)引入雙匹配光柵有效地克服了雙值問(wèn)題同時(shí)擴(kuò)大了檢測(cè)范圍。分析了光纖光柵的測(cè)溫原理并給出了該方案軟硬件設(shè)計(jì),綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    標(biāo)簽: FPGA 光纖光柵 解調(diào)系統(tǒng)

    上傳時(shí)間: 2013-10-10

    上傳用戶:zxc23456789

  • 計(jì)算FR4上的差分阻抗(PDF)

    Calculation of the Differential Impedance of Tracks on FR4 substrates There is a discrepancy between calculated and measured values of impedance for differential transmission lineson FR4. This is especially noticeable in the case of surface microstrip configurations. The anomaly is shown tobe due to the nature of the substrate material. This needs to be considered as a layered structure of epoxy resinand glass fibre. Calculations, using Boundary Element field methods, show that the distribution of the electricfield within this layered structure determines the apparent dielectric constant and therefore affects theimpedance. Thus FR4 cannot be considered to be uniform dielectric when calculating differential impedance.

    標(biāo)簽: FR4 計(jì)算 差分阻抗

    上傳時(shí)間: 2013-10-18

    上傳用戶:masochism

  • 運(yùn)算放大器穩(wěn)定時(shí)間的測(cè)量

    The AN10 begins with a survey of methods for measuring op amp settling time. This commentary develops into circuits for measuring settling time to 0.0005%. Construction details and results are presented. Appended sections cover oscilloscope overload limitations and amplifier frequency compensation.

    標(biāo)簽: 運(yùn)算放大器 穩(wěn)定時(shí)間 測(cè)量

    上傳時(shí)間: 2013-11-14

    上傳用戶:JIMMYCB001

  • CGAL is a collaborative effort of several sites in Europe and Israel. The goal is to make the most i

    CGAL is a collaborative effort of several sites in Europe and Israel. The goal is to make the most important of the solutions and methods developed in computational geometry available to users in industry and academia in a C++ library. The goal is to provide easy access to useful, reliable geometric algorithms

    標(biāo)簽: collaborative several Europe Israel

    上傳時(shí)間: 2015-01-09

    上傳用戶:refent

  • Complete support for EBNF notation; Object-oriented parser design; C++ output; Deterministic bottom-

    Complete support for EBNF notation; Object-oriented parser design; C++ output; Deterministic bottom-up "shift-reduce" parsing; SLR(1), LALR(1) and LR(1) table construction methods; Automatic parse tree creation; Possibility to output parse tree in XML format; Verbose conflict diagnostics; Generation of tree traverse procedures

    標(biāo)簽: Object-oriented Deterministic Complete notation

    上傳時(shí)間: 2014-11-29

    上傳用戶:kr770906

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