The practice of enterprise application development has benefited from the emergence of many new enabling technologies. Multi-tiered object-oriented platforms, such as Java and .NET, have become commonplace.
This an adaptive receiver for a direct-sequence spread spectrum (DS-SS) system over an AWGN channel. The adaptive receiver block is modified from the LMS adaptive filter block in DSP Blockset. For DS-SS signal reception, the adaptive filter needs to have multi-rate operation. The input sample rate is equal to chip rate and the output is at symbol rate. Two rates are related by PG, processing gain
a collection of M-files to study concepts in the following areas of Fuzzy-Set-Theory: Fuzzy or Multivalued Logic, The Calculus of Fuzzy, Quantities, Approximate Reasoning, Possibility Theory, Fuzzy Control, Neuro-Fuzzy Systems.
Description: FASBIR(Filtered Attribute Subspace based Bagging with Injected Randomness) is a variant of Bagging algorithm, whose purpose is to improve accuracy of local learners, such as kNN, through multi-model perturbing ensemble.
Reference: Z.-H. Zhou and Y. Yu. Ensembling local learners through multimodal perturbation. IEEE Transactions on Systems, Man, and Cybernetics - Part B: Cybernetics, 2005, vol.35, no.4, pp.725-735.
This the specification of the Enterprise JavaBeansTM architecture.The Enterprise JavaBeans
architecture is a component architecture for the development and deployment of componentbased
distributed business applications. Applications written using the Enterprise JavaBeans
architecture are scalable, transactional, and multi-user secure. These applications may be written
once, and then deployed on any server platform that supports the Enterprise JavaBeans
specification.
Quality, object.oriented architecture is the product of careful study, decision making, and
experimentation. At a minimum, the object.oriented architecture process includes farming of
requirements, architecture mining, and hands.on experience. Ideally, object.oriented
architecture comprises a set of high.quality design decisions that provide benefits
throughout the life cycle of the system.
This project is created using the Keil ARM CA Compiler.
The Logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already configured to show the PWM output signal on PORT3.0 and PORT3.1
This ARM Example may be debugged using only the uVision Simulator and your PC--no additional hardware or evaluation boards are required. The Simulator provides cycle-accurate simulation of all on-chip peripherals of the ADuC7000 device series.
You may create various input signals like digital pulses, sine waves, sawtooth waves, and square waves using signal functions which you write in C. Signal functions run in the background in the simulator within timing constraints you configure. In this example, several signal functions are defined in the included Startup_SIM.INI file.
This a full 3-tier dababase application which includes a activex dll project(business objects) and a standard exe(UI). Besides all the database techniques it demonstrates, it also shows how to make MSHFlexgrid a editable grid(with combobox, checkbox, datetimepicker) and how to merge a toolbar for multi forms.
