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1. 下列說法正確的是 ( )
A. Java語言不區(qū)分大小寫
B. Java程序以類為基本單位
C. JVM為Java虛擬機(jī)JVM的英文縮寫
D. 運(yùn)行Java程序需要先安裝JDK
2. 下列說法中錯誤的是 ( )
A. Java語言是編譯執(zhí)行的
B. Java中使用了多進(jìn)程技術(shù)
C. Java的單行注視以//開頭
D. Java語言具有很高的安全性
3. 下面不屬于Java語言特點(diǎn)的一項(xiàng)是( )
A. 安全性
B. 分布式
C. 移植性
D. 編譯執(zhí)行
4. 下列語句中,正確的項(xiàng)是 ( )
A . int $e,a,b=10
B. char c,d=’a’
C. float e=0.0d
D. double c=0.0f
標(biāo)簽:
Java
A.
B.
C.
上傳時間:
2017-01-04
上傳用戶:netwolf
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We have a group of N items (represented by integers from 1 to N), and we know that there is some total order defined for these items. You may assume that no two elements will be equal (for all a, b: a<b or b<a). However, it is expensive to compare two items. Your task is to make a number of comparisons, and then output the sorted order. The cost of determining if a < b is given by the bth integer of element a of costs (space delimited), which is the same as the ath integer of element b. Naturally, you will be judged on the total cost of the comparisons you make before outputting the sorted order. If your order is incorrect, you will receive a 0. Otherwise, your score will be opt/cost, where opt is the best cost anyone has achieved and cost is the total cost of the comparisons you make (so your score for a test case will be between 0 and 1). Your score for the problem will simply be the sum of your scores for the individual test cases.
標(biāo)簽:
represented
integers
group
items
上傳時間:
2016-01-17
上傳用戶:jeffery
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The XML Toolbox converts MATLAB data types (such as double, char, struct, complex, sparse, logical) of any level of nesting to XML format and vice versa.
For example,
>> project.name = MyProject
>> project.id = 1234
>> project.param.a = 3.1415
>> project.param.b = 42
becomes with str=xml_format(project, off )
"<project>
<name>MyProject</name>
<id>1234</id>
<param>
<a>3.1415</a>
<b>42</b>
</param>
</project>"
On the other hand, if an XML string XStr is given, this can be converted easily to a MATLAB data type or structure V with the command V=xml_parse(XStr).
標(biāo)簽:
converts
Toolbox
complex
logical
上傳時間:
2016-02-12
上傳用戶:a673761058
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Since the original publication of Manual 74 in 1991, and the preceding
“Guidelines for Transmission Line Structural Loading” in 1984, the
understanding of structural loadings on transmission line structures has
broadened signifi cantly. However, improvements in computational capa-
bility have enabled the transmission line engineer to more easily deter-
mine structural loadings without properly understanding the parameters
that affect these loads. Many seasoned professionals have expressed
concern for the apparent lack of recent information on the topic of struc-
tural loadings as new engineers enter this industry. The Committee on
Electrical Transmission Structures is charged with the responsibility to
report, evaluate, and provide loading requirements of transmission struc-
tures. This task committee was therefore formed to update and revise the
1991 manual.
標(biāo)簽:
Transmission
Guidelines
Electrical
Line
for
上傳時間:
2020-06-07
上傳用戶:shancjb
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特點(diǎn): 精確度0.1%滿刻度 可作各式數(shù)學(xué)演算式功能如:A+B/A-B/AxB/A/B/A&B(Hi or Lo)/|A|/ 16 BIT類比輸出功能 輸入與輸出絕緣耐壓2仟伏特/1分鐘(input/output/power) 寬范圍交直流兩用電源設(shè)計 尺寸小,穩(wěn)定性高
標(biāo)簽:
微電腦
數(shù)學(xué)演算
隔離傳送器
上傳時間:
2014-12-23
上傳用戶:ydd3625
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特點(diǎn)(FEATURES) 精確度0.1%滿刻度 (Accuracy 0.1%F.S.) 可作各式數(shù)學(xué)演算式功能如:A+B/A-B/AxB/A/B/A&B(Hi or Lo)/|A| (Math functioA+B/A-B/AxB/A/B/A&B(Hi&Lo)/|A|/etc.....) 16 BIT 類比輸出功能(16 bit DAC isolating analog output function) 輸入/輸出1/輸出2絕緣耐壓2仟伏特/1分鐘(Dielectric strength 2KVac/1min. (input/output1/output2/power)) 寬范圍交直流兩用電源設(shè)計(Wide input range for auxiliary power) 尺寸小,穩(wěn)定性高(Dimension small and High stability)
標(biāo)簽:
微電腦
數(shù)學(xué)演算
輸出
隔離傳送器
上傳時間:
2013-11-24
上傳用戶:541657925
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/*--------- 8051內(nèi)核特殊功能寄存器 -------------*/
sfr ACC = 0xE0; //累加器
sfr B = 0xF0; //B 寄存器
sfr PSW = 0xD0; //程序狀態(tài)字寄存器
sbit CY = PSW^7; //進(jìn)位標(biāo)志位
sbit AC = PSW^6; //輔助進(jìn)位標(biāo)志位
sbit F0 = PSW^5; //用戶標(biāo)志位0
sbit RS1 = PSW^4; //工作寄存器組選擇控制位
sbit RS0 = PSW^3; //工作寄存器組選擇控制位
sbit OV = PSW^2; //溢出標(biāo)志位
sbit F1 = PSW^1; //用戶標(biāo)志位1
sbit P = PSW^0; //奇偶標(biāo)志位
sfr SP = 0x81; //堆棧指針寄存器
sfr DPL = 0x82; //數(shù)據(jù)指針0低字節(jié)
sfr DPH = 0x83; //數(shù)據(jù)指針0高字節(jié)
/*------------ 系統(tǒng)管理特殊功能寄存器 -------------*/
sfr PCON = 0x87; //電源控制寄存器
sfr AUXR = 0x8E; //輔助寄存器
sfr AUXR1 = 0xA2; //輔助寄存器1
sfr WAKE_CLKO = 0x8F; //時鐘輸出和喚醒控制寄存器
sfr CLK_DIV = 0x97; //時鐘分頻控制寄存器
sfr BUS_SPEED = 0xA1; //總線速度控制寄存器
/*----------- 中斷控制特殊功能寄存器 --------------*/
sfr IE = 0xA8; //中斷允許寄存器
sbit EA = IE^7; //總中斷允許位
sbit ELVD = IE^6; //低電壓檢測中斷控制位
8051
標(biāo)簽:
80C51
特殊功能寄存器
地址
上傳時間:
2013-10-30
上傳用戶:yxgi5
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TLC2543是TI公司的12位串行模數(shù)轉(zhuǎn)換器,使用開關(guān)電容逐次逼近技術(shù)完成A/D轉(zhuǎn)換過程。由于是串行輸入結(jié)構(gòu),能夠節(jié)省51系列單片機(jī)I/O資源;且價格適中,分辨率較高,因此在儀器儀表中有較為廣泛的應(yīng)用。
TLC2543的特點(diǎn)
(1)12位分辯率A/D轉(zhuǎn)換器;
(2)在工作溫度范圍內(nèi)10μs轉(zhuǎn)換時間;
(3)11個模擬輸入通道;
(4)3路內(nèi)置自測試方式;
(5)采樣率為66kbps;
(6)線性誤差±1LSBmax;
(7)有轉(zhuǎn)換結(jié)束輸出EOC;
(8)具有單、雙極性輸出;
(9)可編程的MSB或LSB前導(dǎo);
(10)可編程輸出數(shù)據(jù)長度。
TLC2543的引腳排列及說明
TLC2543有兩種封裝形式:DB、DW或N封裝以及FN封裝,這兩種封裝的引腳排列如圖1,引腳說明見表1
TLC2543電路圖和程序欣賞
#include<reg52.h>
#include<intrins.h>
#define uchar unsigned char
#define uint unsigned int
sbit clock=P1^0; sbit d_in=P1^1;
sbit d_out=P1^2;
sbit _cs=P1^3;
uchar a1,b1,c1,d1;
float sum,sum1;
double sum_final1;
double sum_final;
uchar duan[]={0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f};
uchar wei[]={0xf7,0xfb,0xfd,0xfe};
void delay(unsigned char b) //50us
{
unsigned char a;
for(;b>0;b--)
for(a=22;a>0;a--);
}
void display(uchar a,uchar b,uchar c,uchar d)
{
P0=duan[a]|0x80;
P2=wei[0];
delay(5);
P2=0xff;
P0=duan[b];
P2=wei[1];
delay(5);
P2=0xff;
P0=duan[c];
P2=wei[2];
delay(5);
P2=0xff;
P0=duan[d];
P2=wei[3];
delay(5);
P2=0xff;
}
uint read(uchar port)
{
uchar i,al=0,ah=0;
unsigned long ad;
clock=0;
_cs=0;
port<<=4;
for(i=0;i<4;i++)
{
d_in=port&0x80;
clock=1;
clock=0;
port<<=1;
}
d_in=0;
for(i=0;i<8;i++)
{
clock=1;
clock=0;
}
_cs=1;
delay(5);
_cs=0;
for(i=0;i<4;i++)
{
clock=1;
ah<<=1;
if(d_out)ah|=0x01;
clock=0;
}
for(i=0;i<8;i++)
{
clock=1;
al<<=1;
if(d_out) al|=0x01;
clock=0;
}
_cs=1;
ad=(uint)ah;
ad<<=8;
ad|=al;
return(ad);
}
void main()
{
uchar j;
sum=0;sum1=0;
sum_final=0;
sum_final1=0;
while(1)
{
for(j=0;j<128;j++)
{
sum1+=read(1);
display(a1,b1,c1,d1);
}
sum=sum1/128;
sum1=0;
sum_final1=(sum/4095)*5;
sum_final=sum_final1*1000;
a1=(int)sum_final/1000;
b1=(int)sum_final%1000/100;
c1=(int)sum_final%1000%100/10;
d1=(int)sum_final%10;
display(a1,b1,c1,d1);
}
}
標(biāo)簽:
2543
TLC
上傳時間:
2013-11-19
上傳用戶:shen1230
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#include<iom16v.h>
#include<macros.h>
#define uint unsigned int
#define uchar unsigned char
uint a,b,c,d=0;
void delay(c)
{ for for(a=0;a<c;a++)
for(b=0;b<12;b++);
};
uchar tab[]={
0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90,
標(biāo)簽:
AVR
單片機(jī)
數(shù)碼管
上傳時間:
2013-10-21
上傳用戶:13788529953
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摘要: 串行傳輸技術(shù)具有更高的傳輸速率和更低的設(shè)計成本, 已成為業(yè)界首選, 被廣泛應(yīng)用于高速通信領(lǐng)域。提出了一種新的高速串行傳輸接口的設(shè)計方案, 改進(jìn)了Aurora 協(xié)議數(shù)據(jù)幀格式定義的弊端, 并采用高速串行收發(fā)器Rocket I/O, 實(shí)現(xiàn)數(shù)據(jù)率為2.5 Gbps的高速串行傳輸。關(guān)鍵詞: 高速串行傳輸; Rocket I/O; Aurora 協(xié)議
為促使FPGA 芯片與串行傳輸技術(shù)更好地結(jié)合以滿足市場需求, Xilinx 公司適時推出了內(nèi)嵌高速串行收發(fā)器RocketI/O 的Virtex II Pro 系列FPGA 和可升級的小型鏈路層協(xié)議———Aurora 協(xié)議。Rocket I/O支持從622 Mbps 至3.125 Gbps的全雙工傳輸速率, 還具有8 B/10 B 編解碼、時鐘生成及恢復(fù)等功能, 可以理想地適用于芯片之間或背板的高速串行數(shù)據(jù)傳輸。Aurora 協(xié)議是為專有上層協(xié)議或行業(yè)標(biāo)準(zhǔn)的上層協(xié)議提供透明接口的第一款串行互連協(xié)議, 可用于高速線性通路之間的點(diǎn)到點(diǎn)串行數(shù)據(jù)傳輸, 同時其可擴(kuò)展的帶寬, 為系統(tǒng)設(shè)計人員提供了所需要的靈活性[4]。但該協(xié)議幀格式的定義存在弊端,會導(dǎo)致系統(tǒng)資源的浪費(fèi)。本文提出的設(shè)計方案可以改進(jìn)Aurora 協(xié)議的固有缺陷,提高系統(tǒng)性能, 實(shí)現(xiàn)數(shù)據(jù)率為2.5 Gbps 的高速串行傳輸, 具有良好的可行性和廣闊的應(yīng)用前景。
標(biāo)簽:
Rocket
2.5
高速串行
收發(fā)器
上傳時間:
2013-11-06
上傳用戶:smallfish