The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.
This example implements a gameport translator on the PIC16C765. The
firmware translates a gaming device plugged into the gameport to a USB
gaming device. The firmware is set up to translate the DexxaTM
eight-button gamepad. Changes to the firmware will be necessary
for a different gaming device.
aPLib is a 32-bit compression library based on the compression algorithm
used in aPACK (my executable packer). aPLib is an easy-to-use alternative
to many of the heavy-weight compression libraries available.
This example demonstrates how to erase, write, and read the on-chip 640-byte EEPROM Data Memory of the Analog Devices ADuC812, ADuC814, ADuC816, and ADuC824 devivces. This example includes a µ Vision2 Project with a target for each supported device.
