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pci-<b>pci</b>

利用高速FPGA實現PCI總線接口的設計方案

PCI是一種高性能的局部總線規范，可實現各種功能標準的PCI總線卡。本文簡要介紹了PCI總線的特點、信號與命令，提出了一種利用高速FPGA實現PCI總線接口的設計方案。\r\n

標簽： FPGA PCI 總線接口設計方案

上傳時間： 2013-08-30

上傳用戶：brain kung
基于FPGA的PCI總線接口的設計方案

基于FPGA的PCI總線接口的設計方案\r\n~！

標簽： FPGA PCI 總線接口設計方案

上傳時間： 2013-09-01

上傳用戶：heart520beat
2012TI杯陜西賽題B題--頻率補償電路

2012TI杯陜西賽題H題,2012TI杯陜西賽題B題--頻率補償電路.

標簽： 2012 TI 頻率補償電路

上傳時間： 2013-10-07

上傳用戶：ysystc670
PCI ExpressTM Architecture

PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.

標簽： Architecture ExpressTM PCI

上傳時間： 2013-11-03

上傳用戶：gy592333
pci e PCB設計規范

This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.

標簽： pci PCB 設計規范

上傳時間： 2013-10-15

上傳用戶：busterman
PCI Express電源解決方案

PCI ExpressTM is the third generation of PCI (PeripheralComponent Interconnect) technology used to connect I/Operhipheral devices in computer systems. It is intended asa general purpose I/O device interconnect that meets theneeds of a wide variety of computing platforms such asdesktop, mobile, server and communications. It alsospecifies the electrical and mechanical attributes of thebackplane, connectors and removable cards in thesesystems.

標簽： Express PCI 電源解決方案

上傳時間： 2013-11-17

上傳用戶：squershop
基于PCI總線的STM32運動控制卡的設計

在深入分析了意法半導體公司推出的STM32、高速PCI總線以及運動控制卡的功能和結構特點的基礎上，設計了一款可直接插在PCI 插槽中的伺服運動控制卡。不僅可大大降低了成本，更為開放式數控系統的研究提供了一個全新的思路。結果表明，本文所設計的伺服控制卡滿足了目前控制系統的性能和要求。

標簽： PCI STM 32 總線

上傳時間： 2014-12-25

上傳用戶：l銀幕海
PSHLY-B回路電阻測試儀

PSHLY-B回路電阻測試儀介紹

標簽： PSHLY-B 回路電阻測試儀

上傳時間： 2013-11-05

上傳用戶：木子葉1
基于單片機的數字化B超鍵盤設計

針對目前使用的RS232接口數字化B超鍵盤存在PC主機啟動時不能設置BIOS，提出一種PS2鍵盤的設計方法。基于W78E052D單片機，采用8通道串行A/D轉換器設計了8個TGC電位器信息采集電路，電位器位置信息以鍵盤掃描碼序列形式發送，正交編碼器信號通過XC9536XL轉換為單片機可接收的中斷信號，軟件接收到中斷信息后等效處理成按鍵。結果表明，在滿足開機可設置BIOS同時，又可實現超聲特有功能，不需要專門設計驅動程序，接口簡單，成本低。 Abstract: Aiming at the problem of the digital ultrasonic diagnostic imaging system keyboard with RS232 interface currently used couldn?蒺t set the BIOS when the PC boot， this paper proposed a design method of PS2 keyboards. Based on W78E052D microcontroller，designed eight TGC potentiometers information acquisition circuit with 8-channel serial A/D converter， potentiometer position information sent out with keyboard scan code sequentially.The control circuit based on XC9536 CPLD is used for converting the mechanical actions of the encoders into the signals that can be identified by the MCU， software received interrupt information and equivalently treatmented as key. The results show that the BIOS can be set to meet the boot， ultrasound specific functionality can be achieved at the same time， it does not require specially designed driver，the interface is simple and low cost.

標簽： 單片機 B超數字化鍵盤設計

上傳時間： 2013-10-10

上傳用戶：asdfasdfd
基于PCI9052的PCI局部總線應用

詳細介紹了PCI9052接口器件的功能、結構和使用方法，并結合實際給出了基于PCI9052器件開發PCI總線接口卡的應用實例。 Abstract: The main functions,structures and usage of PCI9052inferface chip are introduced in detail in this paper.And an application example of designing PCI bus interface card based on PCI9052is proposed in this paper.

標簽： PCI 9052 局部總線

上傳時間： 2013-10-16

上傳用戶：togetsomething