無(wú)線傳感器網(wǎng)絡(luò)的主要功能是實(shí)現(xiàn)數(shù)據(jù)發(fā)布,在接收到信息查詢時(shí)能夠以有效的方式傳輸給查詢者.目前的數(shù)據(jù)發(fā)布方式通常基于洪泛機(jī)制查詢信息,浪費(fèi)了有限的能源.雖然一些最近的數(shù)據(jù)發(fā)布協(xié)議從不同程度上解決了這一問(wèn)題,但不能保證查詢成功率.基于圓形節(jié)點(diǎn)分布網(wǎng)絡(luò)模型提出了一種既能減少能源消耗,又能提高成功率的數(shù)據(jù)發(fā)布模式——直徑-弦模式DCS(diameter-chord scheme).該模式利用了每個(gè)圓的弦都存在一個(gè)直徑與之垂直相交的性質(zhì).在此基礎(chǔ)上提出了Two-Phase協(xié)議.它在信息查詢時(shí)分成兩個(gè)工作方式不同的階段進(jìn)行,在第1段查詢不中時(shí)觸發(fā)第2段查找.為了減少Two-Phase的延遲,提出了基于優(yōu)先級(jí)和概率轉(zhuǎn)發(fā)兩種解決方法.理論分析和實(shí)驗(yàn)結(jié)果都表明,所提出的數(shù)據(jù)發(fā)布協(xié)議具有較好的性能.
標(biāo)簽： 數(shù)據(jù) 發(fā)布 方式 查詢
上傳時(shí)間： 2016-04-29
上傳用戶：李夢(mèng)晗
A major goal of this book is to show to make devices that are inherently reliable by design. While a lot of attention has been given to “quality improvement,” the majority of the emphasis has been placed on the processes that occur after the design of a product is complete. Design deficiencies are a significant problem, and can be exceedingly difficult to identify in the field. These types of quality problems can be addressed in the design phase with relatively little effort, and with far less expense than will be incurred later in the process. Unfortunately, there are many hardware designers and organizations that, for various reasons, do not understand the significance and expense of an unreliable design. The design methodology presented in this text is intended to address this problem.
標(biāo)簽： inherently reliable devices design
上傳時(shí)間： 2016-07-30
上傳用戶：xiaodu1124
UML指南An important part of the Unified Modeling Language (UML) is the facilities for drawing use case diagrams. Use cases are used during the analysis phase of a project to identify and partition system functionality. They separate the system into actors and use cases.
標(biāo)簽： facilities UML important the
上傳時(shí)間： 2013-12-23
上傳用戶：417313137
This directory includes matlab interface of the curvelet transform using usfft. Basic functions fdct_usfft.m -- forward curvelet transform afdct_usfft.m -- adjoint curvelet transform ifdct_usfft.m -- inverse curvelet transform fdct_usfft_param.m -- returns the location of each curvelet in phase-space Useful tools fdct_usfft_dispcoef.m -- returns a matrix contains all curvelet coefficients fdct_usfft_pos2idx.m -- for fixed scale and fixed direction, returns the curvelet which is closest to a certain point on the image Demos fdct_usfft_demo_basic.m -- display the shape of a curvelet fdct_usfft_demo_recon.m -- partial reconstruction using curvelet fdct_usfft_demo_disp.m -- display all the curvelet coefficients of an image fdct_usfft_demo_denoise.m -- image denoising using curvelet
標(biāo)簽： directory functions interface transform
上傳時(shí)間： 2016-08-31
上傳用戶：cooran
MATLAB Code for Optimal Quincunx Filter Bank Design Yi Chen July 17, 2006 This file introduces the MATLAB code that implements the two algorithms (i.e., Algorithms 1 and 2 in [1], or Algorithms 4.1 and 4.2 in [2]) used for the construction of quincunx filter banks with perfect reconstruction, linear phase, high coding gain, certain vanishing moments properties, and good frequency selectivity. The code can be used to design quincunx filter banks with two, three, or four lifting steps. The SeDuMi Matlab toolbox [3] is used to solve the second-order cone programming subproblems in the two algorithms, and must be installed in order for this code to work.
標(biāo)簽： introduces Quincunx Optimal MATLAB
上傳時(shí)間： 2014-01-15
上傳用戶：cc1
This MATLAB code simulates the effects of amplitude variation between modulators for the wireless LO.該程序分析由于本振信號(hào)幅度動(dòng)態(tài)變化對(duì)調(diào)制器的影響。
標(biāo)簽： modulators amplitude simulates the
上傳時(shí)間： 2016-12-09
上傳用戶：pinksun9
The following is a list of MATLAB codes which includes the radar absorbing material design, the antenna pattern, the observation points generation, and the amplitude error and phase error calculations.
標(biāo)簽： following absorbing the includes
上傳時(shí)間： 2014-01-04
上傳用戶：l254587896
DDR SDRAM控制器的VHDL源代碼，含詳細(xì)設(shè)計(jì)文檔。 The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS), and Digital Frequency Synthesis (DFS) functions. This application note describes a controller design for a 16-bit DDR SDRAM. The application note and reference design are enhanced versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz, 16-bit data changes at both clock edges. The reference design is fully synthesizable and achieves 133 MHz performance with automatic place and route tools.
上傳時(shí)間： 2014-11-01
上傳用戶：l254587896
計(jì)算全息close all clc clear A=zeros(64) A(15:20,20:40)=1 A(15:50,20:25)=1 A(45:50,20:40)=1 A(30:34,20:35)=1 ％ ppp=exp(rand(64)*pi*2*i) A=A.*ppp ％ Author s email: zjliu2001@163.com figure imshow(abs(A),[]) Fa=fft2(fftshift(A)) Fs=fftshift(Fa) Am=abs(Fs) ％ amplitude Ph=angle(Fs) ％ phase s=11 ％ 這表示邊長(zhǎng)嗎？ cgh=zeros(64*s) th=max(max(abs(Fs)))
標(biāo)簽： 20 close clear zeros
上傳時(shí)間： 2014-10-13
上傳用戶：wweqas
fading 在無(wú)線中的應(yīng)用，計(jì)算lo
標(biāo)簽： fading 無(wú)線 中的應(yīng)用
上傳時(shí)間： 2013-12-14
上傳用戶：aig85
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