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phase-meter

  • XAPP854-數字鎖相環(DPLL)參考設計

    Many applications require a clock signal to be synchronous, phase-locked, or derived fromanother signal, such as a data signal or another clock. This type of clock circuit is important in

    標簽: XAPP DPLL 854 數字鎖相環

    上傳時間: 2014-12-23

    上傳用戶:qq21508895

  • Stabilize Your Transimpedance Amplifier

      Abstract: Transimpedance amplifiers (TIAs) are widely used to translate the current output of sensors like photodiode-to-voltagesignals, since several circuits and instruments can only accept voltage input. An operational amplifier with a feedback resistor fromoutput to the inverting input is the most straightforward implementation of such a TIA. However, even this simple TIA circuit requirescareful trade-offs among noise gain, offset voltage, bandwidth, and stability. Clearly stability in a TIA is essential for good, reliableperformance. This application note explains the empirical calculations for assessing stability and then shows how to fine-tune theselection of the feedback phase-compensation capacitor.

    標簽: Transimpedance Stabilize Amplifier Your

    上傳時間: 2013-11-13

    上傳用戶:daoyue

  • 諧振器論文精選.rar

    Control systems are becoming increasingly dependent on digital processing and so require sensors able to provide direct digital inputs. Sensors based on time measurement, having outputs based on a frequency or phase, have an advantage over conventional analogue sensors in that their outputs can be measured directly in digital systems by pulse counting.

    標簽: 諧振器 論文

    上傳時間: 2013-10-08

    上傳用戶:wuyuying

  • LTC1062的低通濾波器應用

    Highlights the LTC1062 as a lowpass filter in a phase lock loop. Describes how the loop's bandwidth can be increased and the VCO output jitter reduced when the LTC1062 is the loop filter. Compares it with a passive RC loop filter. Also discussed is the use of LTC1062 as simple bandpass and bandstop filter.

    標簽: 1062 LTC 低通濾波器

    上傳時間: 2013-10-24

    上傳用戶:chens000

  • 相敏檢波電路鑒相特性的仿真研究

    分析了調幅信號和載波信號之間的相位差與調制信號的極性的對應關系,得出了相敏檢波電路輸出電壓的極性與調制信號的極性有對應關系的結論。為了驗證相敏檢波電路的這一特性,給出3 個電路方案,分別選用理想元件和實際元件,采用Multisim 對其進行仿真實驗,直觀形象地演示了相敏檢波電路的鑒相特性,是傳統的實際操作實驗所不可比擬的。關鍵詞:相敏檢波;鑒相特性;Multisim;電路仿真 Abstract : The corresponding relation between modulation signal polarity and difference phases of amplitudemodulated signal and the carrier signal ,the polarity of phase2sensitive detecting circuit output voltage and the polarity of modulation signal are correspondent . In order to verify this characteristic ,three elect ric circuit s plans are produced ,idea element s and actual element s are selected respectively. Using Multisim to carry on a simulation experiment ,and then demonst rating the phase detecting characteristic of the phase sensitive circuit vividly and directly. Which is t raditional practical experience cannot be com pared.Keywords :phase sensitive detection ;phase2detecting characteristic ;Multisim;circuit simulation

    標簽: 相敏檢波 電路 仿真研究 鑒相

    上傳時間: 2013-11-23

    上傳用戶:guanhuihong

  • 模擬cmos集成電路設計(design of analog

    模擬集成電路的設計與其說是一門技術,還不如說是一門藝術。它比數字集成電路設計需要更嚴格的分析和更豐富的直覺。嚴謹堅實的理論無疑是嚴格分析能力的基石,而設計者的實踐經驗無疑是誕生豐富直覺的源泉。這也正足初學者對學習模擬集成電路設計感到困惑并難以駕馭的根本原因。.美國加州大學洛杉機分校(UCLA)Razavi教授憑借著他在美國多所著名大學執教多年的豐富教學經驗和在世界知名頂級公司(AT&T,Bell Lab,HP)卓著的研究經歷為我們提供了這本優秀的教材。本書自2000午出版以來得到了國內外讀者的好評和青睞,被許多國際知名大學選為教科書。同時,由于原著者在世界知名頂級公司的豐富研究經歷,使本書也非常適合作為CMOS模擬集成電路設計或相關領域的研究人員和工程技術人員的參考書。... 本書介紹模擬CMOS集成電路的分析與設計。從直觀和嚴密的角度闡述了各種模擬電路的基本原理和概念,同時還闡述了在SOC中模擬電路設計遇到的新問題及電路技術的新發展。本書由淺入深,理論與實際結合,提供了大量現代工業中的設計實例。全書共18章。前10章介紹各種基本模塊和運放及其頻率響應和噪聲。第11章至第13章介紹帶隙基準、開關電容電路以及電路的非線性和失配的影響,第14、15章介紹振蕩器和鎖相環。第16章至18章介紹MOS器件的高階效應及其模型、CMOS制造工藝和混合信號電路的版圖與封裝。 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

    標簽: analog design cmos of

    上傳時間: 2014-12-23

    上傳用戶:杜瑩12345

  • 智能電網安全性

    Abstract: The rapid build out of today's smart grid raises a number of security questions. In this article,we review two recent well-documented security breaches and a report of a security gap. These situationsinclude a 2009 smart-meter hack in Puerto Rico; a 2012 password discovery in grid distributionequipment; and insecure storage of a private key in distribution automation equipment. For each of theseattacks, we examine the breach, the potential threat, and secure silicon methods that, as part of acomplete security strategy, can help thwart the attacks.

    標簽: 智能電網 安全性

    上傳時間: 2013-10-27

    上傳用戶:tecman

  • 基于級聯多電平逆變器的STATCOM研究

    本文提出用級聯多電平逆變器取代變壓器多重化結構的STATCOM 拓撲結構,用載波相移正弦脈寬調制技術(Carrier phase-shifted SPWM,以下簡稱CPS-SPWM)取代工頻調制。這種基于CPS-SPWM 級聯多電平逆變器的STATCOM 不僅去掉了多重化變壓器,而且用較低的開關頻率可以獲得較高的等效開關頻率的輸出效果,簡化了濾波;針對電力系統強耦合、非線性的特征,本文提出了將自抗擾控制應用于STATCOM 裝置的控制策略,此控制策略不但可以大大縮短動態過程,改善系統的動態性能,而且具有較強的魯棒性。

    標簽: STATCOM 級聯 電平逆變器

    上傳時間: 2013-11-20

    上傳用戶:maqianfeng

  • 兩相同步降壓型控制器具有輕負載逐級遞減模式

      Today’s computer, datacom, and telecom systems demandpower supplies that are effi cient, respond quicklyto load transients and accurately regulate the voltageat the load. For example, load current can be measuredby using the inductor DCR, thus eliminating the needfor a dedicated sense resistor. Inductor DCR sensingincreases effi ciency—especially at heavy load—whilereducing component cost and required board space.The LTC®3856 single-output 2-phase synchronous buckcontroller improves the accuracy of inductor DCR sensingby compensating for changes in DCR due to temperature.

    標簽: 同步降壓型 控制器 負載

    上傳時間: 2013-11-05

    上傳用戶:guobing703

  • 開關穩壓器的偏置低噪聲變容

      Telecommunication, satellite links and set-top boxes allrequire tuning a high frequency oscillator. The actualtuning element is a varactor diode, a 2-terminal device thatchanges capacitance as a function of reverse bias voltage.1 The oscillator is part of a frequency synthesizingloop, as detailed in Figure 1. A phase locked loop (PLL)compares a divided down representation of the oscillatorwith a frequency reference. The PLL’s output is levelshifted to provide the high voltage necessary to bias thevaractor, which closes a feedback loop by voltage tuningthe oscillator. This loop forces the voltage controlledoscillator (VCO) to operate at a frequency determined bythe frequency reference and the divider’s division ratio.

    標簽: 開關穩壓器 低噪聲 變容

    上傳時間: 2013-12-20

    上傳用戶:ABCDE

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