-
BIT_SELFREFRESH EQU (1<<22) ;定義SDRAM自刷新標志位
16
17 ;Pre-defined constants 預定義6種工作模式
18 USERMODE EQU 0x10 ;用戶模式
19 FIQMODE EQU 0x11 ;快速中斷模式
20 IRQMODE EQU 0x12 ;中斷模式
21 SVCMODE EQU 0x13 ;監管模式
22 ABORTMODE EQU 0x17 ;異常中斷模式
23 UNDEFMODE EQU 0x1b ;未定義模式
24
25 MODEMASK EQU 0x1f ;模式掩碼
26 NOINT EQU 0xc0 ;取消中斷
27
28 ;The location of stacks;設置6種工作模式的堆棧的起始地址
29 ;在option.inc中定義了_STACK_BASEADDRESS EQU 0x33ff8000
30 UserStack EQU (_STACK_BASEADDRESS-0x3800) ;0x33ff4800 ~
31 SVCStack EQU (_STACK_BASEADDRESS-0x2800) ;0x33ff5800 ~
32 UndefStack EQU (_STACK_BASEADDRESS-0x2400) ;0x33ff5c00 ~
33 AbortStack EQU (_STACK_BASEADDRESS-0x2000) ;0x33ff6000 ~
34 IRQStack EQU (_STACK_BASEADDRESS-0x1000) ;0x33ff7000 ~
35 FIQStack EQU (_STACK_BASEADDRESS-0x0) ;0x33ff8000 ~
標簽：
Mini
2440
啟動代碼
上傳時間：
2013-10-07
上傳用戶：m62383408
-
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
標簽：
FREERTOS
移植
文檔
上傳時間：
2013-10-13
上傳用戶：13162218709
-
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function
Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽：
Transceiver
Virtex
Wizar
GTP
上傳時間：
2013-10-23
上傳用戶：leyesome
-
文中在pre-FFT定時同步算法的基礎上提出一個新的定時同步算法及其改進算法，該算法利用規則集對相關函數和導函數優化的方法得以進一步減小估計方差，本文在給出其推導過程的基礎上給出了仿真結果，并與相關算法進行比較，結果表明新算法的定時估計精度較高且具有一定的魯棒性。
標簽：
OFDM
多徑信道
定時同步算法
上傳時間：
2013-10-29
上傳用戶：hebmuljb
-
同步技術是跳頻通信系統的關鍵技術之一，尤其是在快速跳頻通信系統中，常規跳頻通信通過同步字頭攜帶相關碼的方法來實現同步，但對于快跳頻來說，由于是一跳或者多跳傳輸一個調制符號，難以攜帶相關碼。對此引入雙跳頻圖案方法，提出了一種適用于快速跳頻通信系統的同步方案。采用短碼攜帶同步信息，克服了快速跳頻難以攜帶相關碼的困難。分析了同步性能，仿真結果表明該方案同步時間短、虛警概率低、捕獲概率高，同步性能可靠。
Abstract:
Synchronization is one of the key techniques to frequency-hopping communication system， especially in the fast frequency hopping communication system. In conventional frequency hopping communication systems， synchronization can be achieved by synchronization-head which can be used to carry the synchronization information， but for the fast frequency hopping， Because modulation symbol is transmitted by per hop or multi-hop， it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code， a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code， which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed， and simulation results show that the scheme has the advantages of shorter synchronization time， lower probability of false alarm， higher probability of capture and more reliable of synchronization.
標簽：
快速跳頻
同步技術
通信系統
上傳時間：
2013-11-23
上傳用戶：mpquest
-
12864液晶時鐘顯示程序
LCD 地址變量
;**************變量的定義*****************
RS BIT P2.0 ;LCD數據/命令選擇端(H/L)
RW BIT P2.1 ;LCD讀/寫選擇端(H/L)
EP BIT P2.2 ;LCD使能控制
PSB EQU P2.3
RST EQU P2.5
PRE BIT P1.4 ;調整鍵(K1)
ADJ BIT P1.5 ;調整鍵(K2)
COMDAT EQU P0
LED EQU P0.3
YEAR DATA 18H ;年,月,日變量
MONTH DATA 19H
DATE DATA 1AH
WEEK DATA 1BH
HOUR DATA 1CH ;時,分,秒,百分之一秒變量
MIN DATA 1DH
SEC DATA 1EH
SEC100 DATA 1FH
STATE DATA 23H
LEAP BIT STATE.1 ;是否閏年標志1--閏年，0--平年
KEY_S DATA 24H ;當前掃描鍵值
KEY_V DATA 25H ;上次掃描鍵值
DIS_BUF_U0 DATA 26H ;LCD第一排顯示緩沖區
DIS_BUF_U1 DATA 27H
DIS_BUF_U2 DATA 28H
DIS_BUF_U3 DATA 29H
DIS_BUF_U4 DATA 2AH
DIS_BUF_U5 DATA 2BH
DIS_BUF_U6 DATA 2CH
DIS_BUF_U7 DATA 2DH
DIS_BUF_U8 DATA 2EH
DIS_BUF_U9 DATA 2FH
DIS_BUF_U10 DATA 30H
DIS_BUF_U11 DATA 31H
DIS_BUF_U12 DATA 32H
DIS_BUF_U13 DATA 33H
DIS_BUF_U14 DATA 34H
DIS_BUF_U15 DATA 35H
DIS_BUF_L0 DATA 36H ;LCD第三排顯示緩沖區
DIS_BUF_L1 DATA 37H
DIS_BUF_L2 DATA 38H
DIS_BUF_L3 DATA 39H
DIS_BUF_L4 DATA 3AH
DIS_BUF_L5 DATA 3BH
DIS_BUF_L6 DATA 3CH
DIS_BUF_L7 DATA 3DH
DIS_BUF_L8 DATA 3EH
DIS_BUF_L9 DATA 3FH
DIS_BUF_L10 DATA 40H
DIS_BUF_L11 DATA 41H
DIS_BUF_L12 DATA 42H
DIS_BUF_L13 DATA 43H
DIS_BUF_L14 DATA 44H
DIS_BUF_L15 DATA 45H
FLAG DATA 46H ;1-年，2-月，3-日，4-時，5-分，6-秒，7-退出調整。
DIS_H DATA 47H
DIS_M DATA 48H
DIS_S DATA 49H
標簽：
12864
單片機
液晶時鐘
顯示程序
上傳時間：
2013-11-09
上傳用戶：xingisme
-
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function
Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽：
Transceiver
Virtex
Wizar
GTP
上傳時間：
2013-10-20
上傳用戶：dave520l
-
12864液晶時鐘顯示程序
LCD 地址變量
;**************變量的定義*****************
RS BIT P2.0 ;LCD數據/命令選擇端(H/L)
RW BIT P2.1 ;LCD讀/寫選擇端(H/L)
EP BIT P2.2 ;LCD使能控制
PSB EQU P2.3
RST EQU P2.5
PRE BIT P1.4 ;調整鍵(K1)
ADJ BIT P1.5 ;調整鍵(K2)
COMDAT EQU P0
LED EQU P0.3
YEAR DATA 18H ;年,月,日變量
MONTH DATA 19H
DATE DATA 1AH
WEEK DATA 1BH
HOUR DATA 1CH ;時,分,秒,百分之一秒變量
MIN DATA 1DH
SEC DATA 1EH
SEC100 DATA 1FH
STATE DATA 23H
LEAP BIT STATE.1 ;是否閏年標志1--閏年，0--平年
KEY_S DATA 24H ;當前掃描鍵值
KEY_V DATA 25H ;上次掃描鍵值
DIS_BUF_U0 DATA 26H ;LCD第一排顯示緩沖區
DIS_BUF_U1 DATA 27H
DIS_BUF_U2 DATA 28H
DIS_BUF_U3 DATA 29H
DIS_BUF_U4 DATA 2AH
DIS_BUF_U5 DATA 2BH
DIS_BUF_U6 DATA 2CH
DIS_BUF_U7 DATA 2DH
DIS_BUF_U8 DATA 2EH
DIS_BUF_U9 DATA 2FH
DIS_BUF_U10 DATA 30H
DIS_BUF_U11 DATA 31H
DIS_BUF_U12 DATA 32H
DIS_BUF_U13 DATA 33H
DIS_BUF_U14 DATA 34H
DIS_BUF_U15 DATA 35H
DIS_BUF_L0 DATA 36H ;LCD第三排顯示緩沖區
DIS_BUF_L1 DATA 37H
DIS_BUF_L2 DATA 38H
DIS_BUF_L3 DATA 39H
DIS_BUF_L4 DATA 3AH
DIS_BUF_L5 DATA 3BH
DIS_BUF_L6 DATA 3CH
DIS_BUF_L7 DATA 3DH
DIS_BUF_L8 DATA 3EH
DIS_BUF_L9 DATA 3FH
DIS_BUF_L10 DATA 40H
DIS_BUF_L11 DATA 41H
DIS_BUF_L12 DATA 42H
DIS_BUF_L13 DATA 43H
DIS_BUF_L14 DATA 44H
DIS_BUF_L15 DATA 45H
FLAG DATA 46H ;1-年，2-月，3-日，4-時，5-分，6-秒，7-退出調整。
DIS_H DATA 47H
DIS_M DATA 48H
DIS_S DATA 49H
標簽：
12864
單片機
液晶時鐘
顯示程序
上傳時間：
2013-12-25
上傳用戶：wvbxj
-
Locally weighted polynomial regression LWPR is a popular instance based al gorithm for learning continuous non linear mappings For more than two or three in puts and for more than a few thousand dat apoints the computational expense of pre dictions is daunting We discuss drawbacks with previous approaches to dealing with this problem
標簽：
polynomial
regression
weighted
instance
上傳時間：
2013-11-28
上傳用戶：sunjet
-
Description: C4.5Rule-PANE is a rule learning method which could generate accurate and comprehensible symbolic rules, through regarding a neural network ensemble as a pre-process of a rule inducer.
Reference: Z.-H. Zhou and Y. Jiang. Medical diagnosis with C4.5 rule preceded by artificial neural network ensemble. IEEE Transactions on Information Technology in Biomedicine, 2003, vol.7, no.1, pp.37-42.
使用神經網絡集成方法診斷糖尿病,肝炎,乳腺癌癥的案例研究.
標簽：
comprehensibl
Description
Rule-PANE
accurate
上傳時間：
2013-11-30
上傳用戶：wcl168881111111
