STM32，5110液晶顯示聲納探魚器200KHz，帶電路圖，精確到厘米 MC34063升壓，大聲壓發射，實際板子上濾波電路沒要（電路圖上的濾波電阻電容電感沒焊，開路或者短路）。一般200KHz的換能器在水里面的耦合比較好，在空氣中發射出來的（或者接收的）強度很低。 用的MOSFET Relay，contact和release時間都可以做到很小，不過選的是比較低端器件，所以最近測量距離為70cm。 開源啦開源啦 架構為狀態機+任務流，Task都是放在函數指針數組里面的 Task分兩種，routine的和錯誤處理的 5110液晶的SPI用的DMA 基本上STM32和C語言高階的特征都用上了，稍微修改直接可以商用 Open Issue 偶爾會hardware fault或者memory fault，然后watchdog重啟， 應該比較好解決，仔細檢查下就好 有什么問題代碼的file comment里面有我聯系地址 有能搞到好的器件也請知會我，多謝了 接下來準備把它裝到船模上，用以前四軸的那套東西，就看什么時候有時間了
上傳時間： 2013-10-28
上傳用戶：songyue1991
BIT_SELFREFRESH EQU (1<<22) ;定義SDRAM自刷新標志位 16 17 ;Pre-defined constants 預定義6種工作模式 18 USERMODE EQU 0x10 ;用戶模式 19 FIQMODE EQU 0x11 ;快速中斷模式 20 IRQMODE EQU 0x12 ;中斷模式 21 SVCMODE EQU 0x13 ;監管模式 22 ABORTMODE EQU 0x17 ;異常中斷模式 23 UNDEFMODE EQU 0x1b ;未定義模式 24 25 MODEMASK EQU 0x1f ;模式掩碼 26 NOINT EQU 0xc0 ;取消中斷 27 28 ;The location of stacks;設置6種工作模式的堆棧的起始地址 29 ;在option.inc中定義了_STACK_BASEADDRESS EQU 0x33ff8000 30 UserStack EQU (_STACK_BASEADDRESS-0x3800) ;0x33ff4800 ~ 31 SVCStack EQU (_STACK_BASEADDRESS-0x2800) ;0x33ff5800 ~ 32 UndefStack EQU (_STACK_BASEADDRESS-0x2400) ;0x33ff5c00 ~ 33 AbortStack EQU (_STACK_BASEADDRESS-0x2000) ;0x33ff6000 ~ 34 IRQStack EQU (_STACK_BASEADDRESS-0x1000) ;0x33ff7000 ~ 35 FIQStack EQU (_STACK_BASEADDRESS-0x0) ;0x33ff8000 ~
上傳時間： 2013-10-07
上傳用戶：m62383408
AVR Studio 4.12 includes new device support and numerous overall enhancements;new breakpoint system, integrated AVR GCC development and improved docking system!See release notes for more details.
上傳時間： 2013-12-29
上傳用戶：450976175
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
上傳時間： 2013-10-13
上傳用戶：13162218709
Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
上傳時間： 2014-01-13
上傳用戶：竺羽翎2222
Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.
標簽： CPLD
上傳時間： 2013-10-22
上傳用戶：李哈哈哈
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽： Transceiver Virtex Wizar GTP
上傳時間： 2013-10-23
上傳用戶：leyesome
文中在pre-FFT定時同步算法的基礎上提出一個新的定時同步算法及其改進算法，該算法利用規則集對相關函數和導函數優化的方法得以進一步減小估計方差，本文在給出其推導過程的基礎上給出了仿真結果，并與相關算法進行比較，結果表明新算法的定時估計精度較高且具有一定的魯棒性。
上傳時間： 2013-10-29
上傳用戶：hebmuljb
This errata sheet describes both the known functional problems and anydeviations from the electrical specifications known at the release date ofthis document.Each deviation is assigned a number and its history is tracked in a table atthe end of the document.
上傳時間： 2013-11-22
上傳用戶：liangliang123
This errata sheet describes both the known functional problems and anydeviations from the electrical specifications known at the release date ofthis document.Each deviation is assigned a number and its history is tracked in a table atthe end of the document.
上傳時間： 2014-12-31
上傳用戶：thuyenvinh
