this document is about probabilistic database techniques and applications it is a good tutorial if you are interested in this area
標(biāo)簽： probabilistic applications techniques document
上傳時間： 2013-12-29
上傳用戶：ddddddos
滑模經(jīng)典論文a control engineer s guide to sliding mode control
標(biāo)簽： control engineer sliding guide
上傳時間： 2016-01-21
上傳用戶：dengzb84
Digital CCTV. A Security Professional s Guide 關(guān)于CCTV監(jiān)控攝像機(jī)不可多得的電子書籍
標(biāo)簽： CCTV Professional Security Digital
上傳時間： 2014-01-09
上傳用戶：FreeSky
A Web Tutorial on Discrete Features of Bayes Decision Theory This applet allows for the calculation of the decision boundary given a three dimensional feature vector. Specifically, by stipulating the variables such as the priors, and the conditional likelihoods of each feature with respect to each class, the changing decision boundary will be displayed.
標(biāo)簽： calculation Tutorial Discrete Decision
上傳時間： 2013-12-22
上傳用戶：hxy200501
OFDM Wireless LANs - A Theoretical and Practical Guide
標(biāo)簽： Theoretical Practical Wireless Guide
上傳時間： 2017-01-02
上傳用戶：hfmm633
A short tutorial from MIT for learning MATLAB
標(biāo)簽： learning tutorial MATLAB short
上傳時間： 2014-03-02
上傳用戶：litianchu
Programming - Verilog VHDL Golden Reference Guide DOULOS Church Hatch, 22 Market Place, Ringwood. Hampshire. BH24 1AW England. Tel (+44) (0)1425 471223 Fax (+44) (0)1425 471573 Email info@doulos.co.uk URL http://www.doulos.co.uk
標(biāo)簽： Programming Reference Ringwood Verilog
上傳時間： 2017-05-12
上傳用戶：ainimao
樣板 B 樹 ( B - tree ) 規(guī)則 : (1) 每個節(jié)點內(nèi)元素個數(shù)在 [MIN,2*MIN] 之間, 但根節(jié)點元素個數(shù)為 [1,2*MIN] (2) 節(jié)點內(nèi)元素由小排到大, 元素不重複 (3) 每個節(jié)點內(nèi)的指標(biāo)個數(shù)為元素個數(shù)加一 (4) 第 i 個指標(biāo)所指向的子節(jié)點內(nèi)的所有元素值皆小於父節(jié)點的第 i 個元素 (5) B 樹內(nèi)的所有末端節(jié)點深度一樣
上傳時間： 2017-05-14
上傳用戶：日光微瀾
A Cracking Tutorial for Newbies by FlOrEsTaN Learn cracking to develop better code to defense.
標(biāo)簽： FlOrEsTaN Cracking Tutorial cracking
上傳時間： 2017-06-07
上傳用戶：refent
This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.
標(biāo)簽： programming transceiver document Stratix
上傳時間： 2014-01-15
上傳用戶：wuyuying
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