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schedule

  • 第三章列出了Windows CE執行緒在排程時的幾個主要函數

    第三章列出了Windows CE執行緒在排程時的幾個主要函數，在本章中將藉著分析這些函數的流程，來了解執行緒在排程過程中的行為。本章所節選的程式碼全部來自[CEROOT]\PRIVATE\WINCEOS\COREOS\NK\KERNEL目錄下的 schedule.c檔

    標簽： Windows

    上傳時間： 2015-07-01

    上傳用戶：xiaodu1124

  • 使用OpenMP

    使用OpenMP，并行化兩個向量的乘積 特點：使用多種并行方案reduction，critical，atomic，schedule(static) 分別輸出使用時間，

    標簽： OpenMP

    上傳時間： 2013-12-15

    上傳用戶：zyt

  • To explain the main tasks undertaken by project managers To introduce software project management a

    To explain the main tasks undertaken by project managers To introduce software project management and to describe its distinctive characteristics To discuss project planning and the planning process To show how graphical schedule representations are used by project management To discuss the notion of risks and the risk management process

    標簽： project management undertaken introduce

    上傳時間： 2014-12-07

    上傳用戶：123啊

  • ucosII源碼分析

    ucosII源碼分析，從CPU的執行順序來看吧，這樣也許清晰一些，并且我們暫時拋棄那些Event/MailBox、信號量等元素，還是先看看作為一個OS核心的Task schedule部分內容吧。首先從main函數開始，下面是uC/OS-II main函數的大致流程：

    標簽： ucosII 源碼分析

    上傳時間： 2017-06-19

    上傳用戶：hwl453472107

  • VHDL implementation of the twofish cipher for 128,192 and 256 bit keys. The implementation is in li

    VHDL implementation of the twofish cipher for 128,192 and 256 bit keys. The implementation is in library-like form All needed components up to, including the round/key schedule circuits are implemented, giving the flexibility to be combined in different architectures (iterative, rolled out/pipelined etc). Manual in English is included with more details about how to use the components and/or how to optimize some of them. All testbenches are provided (tables, variable key/text, ECB/CBC monte carlo) for 128, 192 and 256 bit key sizes, along with their respective vector files.

    標簽： implementation twofish cipher VHDL

    上傳時間： 2017-06-25

    上傳用戶：王小奇

  • Matlab Job schedule

    Matlab 的 任務調用 模擬代碼，可以直接調試運行

    標簽： Matlab JSP

    上傳時間： 2016-01-22

    上傳用戶：gaojianbo

  • System Requirements Analysis

    The serious study of the practice of how to determine the appropriate content of a specification is a seldom-appreciated pastime. Those who have the responsibility to design a product would prefer a greater degree of freedom than permitted by the con- tent of a specification. Many of those who would manage those who would design a product would prefer to allocate all of the project funding and schedule to what they consider more productive labor. These are the attitudes, of course, that doom a project to defeat but they are hard to counter no matter how many times repeated by design engineers and managers. A system engineer who has survived a few of these experiences over a long career may retire and forget the past but we have an endur- ing obligation to work toward changing these attitudes while trying to offer younger system engineers a pathway toward a more sure success in requirements analysis and specification publishing.

    標簽： Requirements Analysis System

    上傳時間： 2020-06-01

    上傳用戶：shancjb

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