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second-CLOCK

  • K3:--- P1.6 K4:--- P1.7 BEEP:--- P3.7 K3 --- 控制按鍵 K4 --- 清零按鍵 開機(jī)顯示: second-CLOCK 0 TIM

    K3:--- P1.6 K4:--- P1.7 BEEP:--- P3.7 K3 --- 控制按鍵 K4 --- 清零按鍵 開機(jī)顯示: second-CLOCK 0 TIME 00:00:00:00 K3 --- 控制按鍵: 第一次按下時(shí),開始計(jì)時(shí)。 顯示 BEGIN COUNT 1 TIME 00:00:01:88 第二次按下時(shí),暫停計(jì)時(shí)。 顯示 PAUST COUNT 2 TIME 00:00:01:88 第三次按下時(shí),累計(jì)計(jì)時(shí)。 顯示 BEGIN COUNT 3 TIME 00:08:08:88 第四次按下時(shí),暫停計(jì)時(shí)。 顯示 PAUST COUNT 4 TIME 00:08:08:88 K4 --- 清零按鍵: 在任何狀態(tài)下,按一下K4,均可清零。 顯示 second-CLOCK 0 TIME 00:00:00:00 0,1,2,3,4 表示按下K3鍵的次數(shù)。

    標(biāo)簽: second-CLOCK K3 BEEP K4

    上傳時(shí)間: 2014-01-14

    上傳用戶:515414293

  • K3:--- P1.6 K4:--- P1.7 BEEP:--- P3.7 K3 --- 控制按鍵 K4 --- 清零按鍵 開機(jī)顯示: second-CLOCK 0 TIM

    K3:--- P1.6 K4:--- P1.7 BEEP:--- P3.7 K3 --- 控制按鍵 K4 --- 清零按鍵 開機(jī)顯示: second-CLOCK 0 TIME 00:00:00:00 K3 --- 控制按鍵: 第一次按下時(shí),開始計(jì)時(shí)。 顯示 BEGIN COUNT 1 TIME 00:00:01:88 第二次按下時(shí),暫停計(jì)時(shí)。 顯示 PAUST COUNT 2 TIME 00:00:01:88 第三次按下時(shí),累計(jì)計(jì)時(shí)。

    標(biāo)簽: second-CLOCK K3 BEEP K4

    上傳時(shí)間: 2016-05-10

    上傳用戶:清風(fēng)冷雨

  • c8051f020 實(shí)時(shí)時(shí)鐘模塊程序 內(nèi)含IIC模塊程序/********************** SYSTEM CLOCK 8M********************************/

    c8051f020 實(shí)時(shí)時(shí)鐘模塊程序 內(nèi)含IIC模塊程序/********************** SYSTEM CLOCK 8M********************************/ extern unsigned char xdata currenttime[16]={0} extern unsigned char xdata settime[16]={ 0x00, // control regesiter 1 0x00, // control regesiter 2 0x01, //current second 0x19, //current minute 0x20, //current hour 0x29, //current data 0x04, //current week 0x07, //current month 0x05, //current year 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // alarm value reset 0x00, // clk out disable 0x00, // close timer 0x00, } /*********************************************************************/ extern void Current_Time ( void ) extern void Set_Time ( void )

    標(biāo)簽: c8051f020 SYSTEM CLOCK IIC

    上傳時(shí)間: 2015-06-30

    上傳用戶:edisonfather

  • There are many different (and often confusing) terms associated with clock-based devices. This appl

    There are many different (and often confusing) terms associated with clock-based devices. This application note attempts to clarify these terms, and hence serves as a comprehensive reference on clock terminology. This application note can be divided into two sections. The first section describes and distinguishes between various clock sources available today. The second section defines and distinguishes between various parameters used to describe clocks. This section also provides methods of measuring some of these parameters.

    標(biāo)簽: clock-based associated different confusing

    上傳時(shí)間: 2015-12-02

    上傳用戶:sssl

  • simple clock display clock Dimensions,Draw the circle and numbers,Formats the date ,Font for number

    simple clock display clock Dimensions,Draw the circle and numbers,Formats the date ,Font for number ,Color of main hands and dial,Color of second hand and numbers

    標(biāo)簽: clock Dimensions the Formats

    上傳時(shí)間: 2014-11-24

    上傳用戶:wanqunsheng

  • fpga digital clock

    My thesis entitled \"fpga digital clock,\" immature, to enlighten

    標(biāo)簽: digital clock fpga

    上傳時(shí)間: 2013-08-31

    上傳用戶:smallfish

  • 基于(英蓓特)STM32V100的串口程序

    This example provides a description of how  to use the USART with hardware flowcontrol and communicate with the Hyperterminal.First, the USART2 sends the TxBuffer to the hyperterminal and still waiting fora string from the hyperterminal that you must enter which must end by '\r'character (keypad ENTER button). Each byte received is retransmitted to theHyperterminal. The string that you have entered is stored in the RxBuffer array. The receivebuffer have a RxBufferSize bytes as maximum. The USART2 is configured as follow:    - BaudRate = 115200 baud      - Word Length = 8 Bits    - One Stop Bit    - No parity    - Hardware flow control enabled (RTS and CTS signals)    - Receive and transmit enabled    - USART Clock disabled    - USART CPOL: Clock is active low    - USART CPHA: Data is captured on the second edge     - USART LastBit: The clock pulse of the last data bit is not output to                      the SCLK pin

    標(biāo)簽: V100 STM 100 32V

    上傳時(shí)間: 2013-10-31

    上傳用戶:yy_cn

  • Java實(shí)現(xiàn)clock

    Java實(shí)現(xiàn)clock

    標(biāo)簽: clock Java

    上傳時(shí)間: 2014-11-27

    上傳用戶:Yukiseop

  • Java Clock is a FREE Java applet used to display a clock on your Web pages. You can display either a

    Java Clock is a FREE Java applet used to display a clock on your Web pages. You can display either analog or digital clock. The full source code of this applet is also available (visit my home page to download it). You may use this applet on your Web pages WITHOUT paying me fee or royalty as long as credit is given (a link to my home page is enough).

    標(biāo)簽: display Java applet either

    上傳時(shí)間: 2014-01-12

    上傳用戶:woshiayin

  • Python Essential Reference, Second Edition

    Python Essential Reference, Second Edition

    標(biāo)簽: Essential Reference Edition Python

    上傳時(shí)間: 2015-02-17

    上傳用戶:c12228

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