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uwb tranciever settings
標(biāo)簽：
tranciever
settings
uwb
上傳時間：
2014-11-28
上傳用戶：sclyutian
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A simple program to connect to a postgres database. You ll need to alter the database settings for it to work.
標(biāo)簽：
database
postgres
settings
to
上傳時間：
2013-12-28
上傳用戶：zhaoq123
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FEATURES
Unique 1-Wire interface requires only one port pin for communication
Multidrop capability simplifies distributed temperature sensing applications
Requires no external components
Can be powered from data line. Power supply range is 3.0V to 5.5V
Zero standby power required
Measures temperatures from -55°C to +125°C. Fahrenheit equivalent is -67°F to +257°F
±0.5°C accuracy from -10°C to +85°C
Thermometer resolution is programmable from 9 to 12 bits
Converts 12-bit temperature to digital word in 750 ms (max.)
User-definable, nonvolatile temperature alarm settings
Alarm search command identifies and addresses devices whose temperature is outside of programmed limits (temperature
alarm condition)
Applications include thermostatic controls, industrial systems, consumer products,
thermometers, or any thermally sensitive system
標(biāo)簽：
18B
B20
DS
18
上傳時間：
2013-08-04
上傳用戶：CHENKAI
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This application note is intended for system designers who require a hardware
implementation overview of the development board features such as the power supply, the
clock management, the reset control, the boot mode settings and the debug management. It
shows how to use the High-density and Medium-density STM32F10xxx product families and
describes the minimum hardware resources required to develop an STM32F10xxx
application.
標(biāo)簽：
2586
stm
AN
32
上傳時間：
2013-04-24
上傳用戶：epson850
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中文平臺在PCB中放置字符串時選擇SERF字體可顯示中文但打印時亂碼。\r\n在PCB中打印中文可使用漢字PCBHZ補(bǔ)丁。\r\n步驟：\r\n 1，安裝中文平臺；\r\n 2，將PCBHZ文件包放入Altium2004根目錄；\r\n 3, 將DXP.RCS文件放入C:\\Documents and settings\\個人文件夾\\Application Data\\Altium2004目錄 \r\n 4，重新啟動DXP2004.\r\n 5，在PCB界面中加載PCBHZ文件包中的hanzi庫文件；\
標(biāo)簽：
SERF
PCB
字符串
字體
上傳時間：
2013-09-16
上傳用戶：金宜
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介紹基于ISA總線與KH-9300的數(shù)據(jù)采集板卡的設(shè)置，詳細(xì)說明8254定時計(jì)數(shù)器及8259中斷控制器的結(jié)構(gòu)特點(diǎn)、工作方式、控制字等，探討中斷類型、中斷處理程序、中斷矢量表及其填寫。重點(diǎn)講述使用TorboC編寫中斷服務(wù)程序的方法，應(yīng)注意的主要問題及程序測試的結(jié)果。
Abstract:
The settings of KH-9300 data acquisition board based on the ISA bus is introduced,the structural characteristics,working methods,control characters of the timing counter 8254 and interruptioncontroller 8259 are explained in detail.The interruption type,interrupt handling programs,interruption vector table and its filling also are discussed.Further,great emphasis is put on the method of interrupt service program compiled by Torbo C,the main issues that should be noted,and the results of program testing.
標(biāo)簽：
9300
ISA
KH
總線
上傳時間：
2013-11-14
上傳用戶：qq527891923
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本文介紹了基于AT89C52 單片機(jī)的自動水溫控制系統(tǒng)的設(shè)計(jì)及實(shí)現(xiàn)過程。該系統(tǒng)具有實(shí)時顯示、溫度測量、溫度設(shè)定并能根據(jù)設(shè)定值對環(huán)境溫度進(jìn)行調(diào)節(jié)實(shí)現(xiàn)控溫的目的以及達(dá)到上下限溫度報(bào)警功能，控制算法是基于數(shù)字PID 算法。關(guān)鍵詞 ：PID AT89C52 脈寬調(diào)制 實(shí)時
Abstract ： This article describes AT89C52 single-chip microcomputer-basedautomatic water temperature control system design and implementation process. Thesystem has real-time display, temperature measurement, temperature settings and theenvironment in accordance with the temperature settings adjusted to achieve thepurpose of temperature control and reach the upper and lower limits of temperaturealarm function, the control algorithm is based on the digital PID algorithm.Keyword: PID AT89C52 PWM real time
標(biāo)簽：
89S
S52
AT
89
上傳時間：
2013-10-10
上傳用戶：歸海惜雪
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The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function
Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標(biāo)簽：
Transceiver
Virtex
Wizar
GTP
上傳時間：
2013-10-23
上傳用戶：leyesome
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The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function
Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標(biāo)簽：
Transceiver
Virtex
Wizar
GTP
上傳時間：
2013-10-20
上傳用戶：dave520l
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The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in the Virtex-4 FPGA. Each MGT has its own pattern checker, but bothMGTs in a channel share the same pattern generator. Each channel can load a differentpattern. The MGT serial rate depends on the reference clock frequency and the internal PMAdivider settings. The reference design can be scaled anywhere from one channel (two MGTs)to twelve channels (twenty-four MGTs).
標(biāo)簽：
RocketIO
Virtex
XAPP
713
上傳時間：
2013-12-25
上傳用戶：jkhjkh1982
