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signal-disposal-programme

  • signal generate programme

    signal generate programme

    標(biāo)簽: programme generate signal

    上傳時(shí)間: 2016-05-04

    上傳用戶:chenjjer

  • CCS編程環(huán)境 使用的是匯編加C的混合編程方法: The programme of the Correlation Algorithm. Using INT2 to get the input s

    CCS編程環(huán)境 使用的是匯編加C的混合編程方法: The programme of the Correlation Algorithm. Using INT2 to get the input signal. Array x, in first step, is the input signal produced by programme, in next step, is the input signal get from A/D, the length is 128, 32-bit floating point. Array y, in first step, is the input signal produced by programme, in next step, is the input signal get from A/D, the length is 128, 32-bit floating point. Array cor is the Correlation result, the length is 255, 32-bit floating point.

    標(biāo)簽: Correlation Algorithm programme the

    上傳時(shí)間: 2013-12-21

    上傳用戶:leixinzhuo

  • C++ Algorithms for Digital Signal Processing 第4章 濾波器程序

    C++ Algorithms for Digital Signal Processing 第4章 濾波器程序

    標(biāo)簽: Algorithms Processing Digital Signal

    上傳時(shí)間: 2013-08-01

    上傳用戶:eeworm

  • 利用Allegro進(jìn)行差分信號(hào)(Differential Signal)在高速電路設(shè)計(jì)需要注意的問(wèn)題

    差分信號(hào)(Differential Signal)在高速電路設(shè)計(jì)中的應(yīng)用越來(lái)越廣泛,差分線大多為電路中最關(guān)鍵的信號(hào),差分線布線的好壞直接影響到PCB板子信號(hào)質(zhì)量。

    標(biāo)簽: Differential Allegro Signal 差分信號(hào)

    上傳時(shí)間: 2013-09-04

    上傳用戶:jennyzai

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    標(biāo)簽: Signal Input Fall Rise

    上傳時(shí)間: 2013-10-23

    上傳用戶:copu

  • this a programme that you can use socket programme

    this a programme that you can use socket programme

    標(biāo)簽: programme socket this that

    上傳時(shí)間: 2013-12-19

    上傳用戶:Altman

  • this is also a unix programme book ,you can find many code in it

    this is also a unix programme book ,you can find many code in it

    標(biāo)簽: programme this also book

    上傳時(shí)間: 2015-01-15

    上傳用戶:ruixue198909

  • 用系統(tǒng)調(diào)用signal()讓父進(jìn)程捕捉鍵盤(pán)上來(lái)的中斷信號(hào)(按Ctrl-C鍵);當(dāng)捕捉到中斷信號(hào)后

    用系統(tǒng)調(diào)用signal()讓父進(jìn)程捕捉鍵盤(pán)上來(lái)的中斷信號(hào)(按Ctrl-C鍵);當(dāng)捕捉到中斷信號(hào)后,父進(jìn)程用系統(tǒng)調(diào)用kill()向兩個(gè)子進(jìn)程發(fā)出信號(hào),子進(jìn)程捕捉到信號(hào)后分別輸出下列信息后終止:  Child Process 1 is Killed by Parent!  Child Process 2 is Killed by Parent! 父進(jìn)程等待兩個(gè)子進(jìn)程終止后,輸出如下的信息后終止: Parent Process is Killed!

    標(biāo)簽: signal Ctrl-C 中斷 信號(hào)

    上傳時(shí)間: 2015-02-27

    上傳用戶:ywqaxiwang

  • 實(shí)時(shí)信號(hào)處理((eWiley) Real-Time Digital Signal Processing)很好的教材

    實(shí)時(shí)信號(hào)處理((eWiley) Real-Time Digital Signal Processing)很好的教材

    標(biāo)簽: Processing Real-Time Digital eWiley

    上傳時(shí)間: 2014-01-18

    上傳用戶:Late_Li

  • this ASSEMBLY programme could show ASC codes ,you can leran how to show chars on display

    this ASSEMBLY programme could show ASC codes ,you can leran how to show chars on display

    標(biāo)簽: show programme ASSEMBLY display

    上傳時(shí)間: 2015-03-01

    上傳用戶:Thuan

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