以C8051F020為核心處理器，設(shè)計(jì)無(wú)線傳感器網(wǎng)絡(luò)數(shù)據(jù)采集系統(tǒng)。系統(tǒng)采用SZ05-ADV型無(wú)線通訊模塊組建Zigbee無(wú)線網(wǎng)絡(luò)，結(jié)合嵌入式系統(tǒng)的軟硬件技術(shù)，完成終端節(jié)點(diǎn)的8路傳感器信號(hào)的數(shù)據(jù)采集。現(xiàn)場(chǎng)8路信號(hào)通過(guò)前端處理后，分別送入C8051F020的12位A/D轉(zhuǎn)換器進(jìn)行轉(zhuǎn)換。經(jīng)過(guò)精確處理、存儲(chǔ)后的現(xiàn)場(chǎng)數(shù)據(jù)，通過(guò)Zigbee無(wú)線網(wǎng)絡(luò)傳送到上位機(jī)，系統(tǒng)可達(dá)到汽車試驗(yàn)中無(wú)線測(cè)試的目的。 Abstract: This paper designs a wireless sensor network system for data acquisition with C8051F020 as core processors.The system used SZ05-ADV wireless communication module，set up a Zigbee wireless network， combined with hardware and software technologies of embedded systems，completed the end-node 8-locale sensor signal data acquisition.Eight locale signals were sent separately into the 12-bit ADC of C8051F020 for conversion through front treatment.After accurate processing and storage，the locale data was transmitted to the host computer through Zigbee wireless.The system achieves the purpose of wireless testing in vehicle trial.
標(biāo)簽： C8051F020 Zigbee 汽車測(cè)試 系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-11-23
上傳用戶：dsgkjgkjg
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標(biāo)簽： Signal Input Fall Rise
上傳時(shí)間： 2013-10-23
上傳用戶：copu
波長(zhǎng)信號(hào)的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵，基于現(xiàn)有的光纖光柵傳感器解調(diào)方法，提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法，此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng)，并且通過(guò)引入雙匹配光柵有效地克服了雙值問題同時(shí)擴(kuò)大了檢測(cè)范圍。分析了光纖光柵的測(cè)溫原理并給出了該方案軟硬件設(shè)計(jì)，綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network， based on several existing methods of fiber grating sensor demodulation inadequate， a two-match fiber grating demodulation method was presented. This system is a high-speed， high precision， low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA，this paper gives the curve fitting algorithm based on Lagrange.
標(biāo)簽： FPGA 光纖光柵 解調(diào)系統(tǒng)
上傳時(shí)間： 2014-07-24
上傳用戶：caiguoqing
波長(zhǎng)信號(hào)的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵，基于現(xiàn)有的光纖光柵傳感器解調(diào)方法，提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法，此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng)，并且通過(guò)引入雙匹配光柵有效地克服了雙值問題同時(shí)擴(kuò)大了檢測(cè)范圍。分析了光纖光柵的測(cè)溫原理并給出了該方案軟硬件設(shè)計(jì)，綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network， based on several existing methods of fiber grating sensor demodulation inadequate， a two-match fiber grating demodulation method was presented. This system is a high-speed， high precision， low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA，this paper gives the curve fitting algorithm based on Lagrange.
標(biāo)簽： FPGA 光纖光柵 解調(diào)系統(tǒng)
上傳時(shí)間： 2013-10-10
上傳用戶：zxc23456789
image processing including fourier,wavelet,segmentation etc.
標(biāo)簽： segmentation processing including fourier
上傳時(shí)間： 2014-12-06
上傳用戶：ikemada
用系統(tǒng)調(diào)用signal()讓父進(jìn)程捕捉鍵盤上來(lái)的中斷信號(hào)（按Ctrl-C鍵）；當(dāng)捕捉到中斷信號(hào)后，父進(jìn)程用系統(tǒng)調(diào)用kill()向兩個(gè)子進(jìn)程發(fā)出信號(hào)，子進(jìn)程捕捉到信號(hào)后分別輸出下列信息后終止： Child Process 1 is Killed by Parent! Child Process 2 is Killed by Parent! 父進(jìn)程等待兩個(gè)子進(jìn)程終止后，輸出如下的信息后終止： Parent Process is Killed!
標(biāo)簽： signal Ctrl-C 中斷 信號(hào)
上傳時(shí)間： 2015-02-27
上傳用戶：ywqaxiwang
Generation of a Sine Wave Using a TMS320C54x Digital Signal Processor
標(biāo)簽： Generation Processor Digital Signal
上傳時(shí)間： 2015-03-04
上傳用戶：asdkin
文章描述了TMS320C6000 digital signal processors (DSPs)的CPU結(jié)構(gòu)、管道技術(shù)、指令系統(tǒng).
標(biāo)簽： processors digital signal C6000
上傳時(shí)間： 2015-03-15
上傳用戶：wangdean1101
This an adaptive receiver for a direct-sequence spread spectrum (DS-SS) system over an AWGN channel. The adaptive receiver block is modified from the LMS adaptive filter block in DSP Blockset. For DS-SS signal reception, the adaptive filter needs to have multi-rate operation. The input sample rate is equal to chip rate and the output is at symbol rate. Two rates are related by PG, processing gain
標(biāo)簽： direct-sequence adaptive receiver spectrum
上傳時(shí)間： 2014-01-16
上傳用戶：D&L37
關(guān)于matlab與digital signal的幾個(gè)源程序。具體內(nèi)容請(qǐng)自己下載看！
標(biāo)簽： digital matlab signal 源程序
上傳時(shí)間： 2015-04-12
上傳用戶：aix008
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
