This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上傳時間： 2013-11-23
上傳用戶：shen_dafa
The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.
上傳時間： 2013-10-09
上傳用戶：evil
三菱編程，包含組網通信，1:N,N:N,1:1 ，C-C LINK.
上傳時間： 2013-10-13
上傳用戶：neu_liyan
在集成電路內建自測試的過程中，電路的測試功耗通常顯著高于正常模式產生的功耗，因此低功耗內建自測試技術已成為當前的一個研究熱點。為了減少被測電路內部節點的開關翻轉活動率，研究了一種隨機單輸入跳變（Random Single Input Change，RSIC）測試向量生成器的設計方案，利用VHDL語言描述了內建自測試結構中的測試向量生成模塊，進行了計算機模擬仿真并用FPGA（EP1C6Q240C8）加以硬件實現。實驗結果證實了這種內建自測試原理電路的正確性和有效性。
上傳時間： 2013-10-08
上傳用戶：llwap
SWIFT 提供的服務 1、接入服務 SWIFT的接入服務通過SWIFTAlliance的系列產品完成，包括： （1） SWIFTAlliance Access and Entry：傳送FIN信息的接口軟件； （2） SWIFTAlliance Gateway：接入SWIFTNet的窗口軟件； （3） SWIFTAlliance Webstation：接入SWIFTNet的桌面接入軟件； （4） File Transfer Interface：文件傳輸接口軟件，通過SWIFTNet FileAct是用戶方便的訪問其后臺辦公系統。 SWIFTNET Link軟件內嵌在SWIFTAlliance Gateway和SWIFTAlliance Webstation中，提供傳輸、標準化、安全和管理服務。連接后，它確保用戶可以用同一窗口多次訪問SWIFTNet，獲得不同服務。
上傳時間： 2013-12-22
上傳用戶：sclyutian
OpenVPN is a robust and highly flexible tunneling application that uses all of the encryption, authentication, and certification features of the OpenSSL library to securely tunnel IP networks over a single TCP/UDP port.
標簽： application encryption tunneling flexible
上傳時間： 2014-01-13
上傳用戶：hzy5825468
Password Safe Password Safe is a password database utility. Users can keep their passwords securely encrypted on their computers. A single Safe Combination unlocks them all.
標簽： Password Safe passwords database
上傳時間： 2015-01-19
上傳用戶：李彥東
Tug of War(A tug of war is to be arranged at the local office picnic. For the tug of war, the picnickers must be divided into two teams. Each person must be on one team or the other the number of people on the two teams must not differ by more than 1 the total weight of the people on each team should be as nearly equal as possible. The first line of input contains n the number of people at the picnic. n lines follow. The first line gives the weight of person 1 the second the weight of person 2 and so on. Each weight is an integer between 1 and 450. There are at most 100 people at the picnic. Your output will be a single line containing 2 numbers: the total weight of the people on one team, and the total weight of the people on the other team. If these numbers differ, give the lesser first. )
上傳時間： 2014-01-07
上傳用戶：離殤
小型加減乘除計數器-ASM程序，包含LINK.EXE,MASM.EXE.
上傳時間： 2014-01-09
上傳用戶：leehom61
Java Clock is a FREE Java applet used to display a clock on your Web pages. You can display either analog or digital clock. The full source code of this applet is also available (visit my home page to download it). You may use this applet on your Web pages WITHOUT paying me fee or royalty as long as credit is given (a link to my home page is enough).
標簽： display Java applet either
上傳時間： 2014-01-12
上傳用戶：woshiayin
