VHDL 關于2DFFT設計程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be seen in the following section. u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus network, and it support these sub-modules scinode1∼ scinode9 reset and clk and global_cnt signals to synchronous the sub-modules to simplify the overall design. u proj2.wfc: VSS simulation result that is the same as the ModelSim simulation result. u Pro2_2.wfc: VSS simulation result of another test pattern can’t cause overflow situation.
標簽： scinode1 scinode details 2DFFT
上傳時間： 2014-12-02
上傳用戶：15071087253
DIGITAL IMAGERY is pervasive in our world today. Consequently, standards for the efficient representation and interchange of digital images are essential. To date, some of the most successful still image compression standards have resulted from the ongoing work of the Joint Photographic Experts Group (JPEG). This group operates under the auspices of Joint Technical Committee 1, Subcommittee 29, Working Group 1 (JTC 1/SC 29/WG 1), a collaborative effort between the International Organization for Standardization (ISO) and International Telecommunication Union Standardization Sector (ITUT). Both the JPEG [1–3] and JPEG-LS [4–6] standards were born from the work of the JPEG committee. For the last few years, the JPEG committee has been working towards the establishment of a new standard known as JPEG 2000 (i.e., ISO/IEC 15444). The fruits of these labors are now coming to bear, as JPEG-2000 Part 1 (i.e., ISO/IEC 15444-1 [7]) has recently been approved as a new international standard.
標簽： Consequently efficient pervasive standards
上傳時間： 2013-12-21
上傳用戶：源弋弋
一種基于二維鏈表的稀疏矩陣模半板類設計 A template Class of sparse matrix. Key technology: bin,2-m linked matrix. constructors: 1.normal constuctor 2.copy constuctor. 3.assignment constructor. Basic operator: 1. addition(sub) of two matrix 2. inverse of a matrix. 3. multiply of two matrix. etc.
標簽： matrix technology template linked
上傳時間： 2013-12-13
上傳用戶：lwwhust
Wavelets have widely been used in many signal and image processing applications. In this paper, a new serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet transform, which is realised using some FIFO memory modules implementing a pixel-level pipeline architecture to compress and decompress images. The real filter calculation over 4 · 4 window blocks is done using a tree of carry save adders to ensure the high speed processing required for many applications. The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis reveals that the proposed architecture, implemented using current VLSI technologies, can process a video stream in real time.
標簽： applications processing Wavelets widely
上傳時間： 2014-01-22
上傳用戶：hongmo
RTEMS (Real-Time Executive for Multiprocessor Systems) is a free open source real-time operating system designed for embedded systems. The acronym RTEMS initially stood for Real-Time Executive for Missile Systems, then became Real-Time Executive for Military Systems before changing to its current meaning. RTEMS development began in the late 1980s with early versions of RTEMS available via ftp as early as 1993. OAR Corporation is currently managing the RTEMS project in cooperation with a Steering Committee which includes user representatives.
標簽： Multiprocessor Executive Real-Time real-time
上傳時間： 2015-08-09
上傳用戶：D&L37
基本模型機的設計與實現(xiàn)主要內(nèi)容： 設計一個較為完整的計算機、并編寫一些簡單的指令 基本要求： 設計器材： Dais-CMH+/CMH 計算器組成原理教學實驗系統(tǒng)一臺，實驗用扁平線、導線若干。 設計目的： ⒈ 在掌握部件單元電路實驗的基礎上，進一步將其組成系統(tǒng)地構(gòu)造一臺基本模型計算機。 ⒉ 為其定義5條機器指令，并編寫相應的微程序，上機調(diào)試掌握整機概念。 實現(xiàn)較為完整的計算機、并編寫一些簡單的指令。 設計目標： 本次設計將能在微程序控制下自動產(chǎn)生各部件單元的控制信號，實現(xiàn)特定指令的功能。在該試驗中采用五條機器指令：IN（輸入）、SUB（二進制減法）、STA（存數(shù)）、OUT（輸出）、JMP（無條件轉(zhuǎn)移），整體實現(xiàn)二進制數(shù)連續(xù)相減的功能。上機調(diào)試實現(xiàn)這五種指令功能。
上傳時間： 2014-02-18
上傳用戶：zwei41
initial working phase of the design of said editor, featuring multicasting, advanced linux keyboard handling, sub-hierarchical expansion, and multiple cursors (similar to the concept found in moonedit). The author respectfully requests your compliance with the GPL
標簽： multicasting featuring advanced keyboard
上傳時間： 2015-08-27
上傳用戶：invtnewer
The source code samples for chapter 2, 4, 6, and 8 are contained in the EvenChapters project. Those chapters all reference various aspects of this single project. The source code for the BullsEye control (chapter 10 example) is in the BullEyeCtl project. The source samples for the other chapters are provided in the Chapter XX sub-directories.
標簽： EvenChapters contained chapter samples
上傳時間： 2015-09-07
上傳用戶：yuchunhai1990
The Hardware folder contains the following files:- 1) Sram_Interface.bit -----------------> Bitstream File 2) Sram_Interface.ucf -----------------> UCF File 3) Sram_Interface.vhd -----------------> Main Entity 4) Sram_Interface_tb.vhd ------------> Test Bench 5) SRAM_RD_WR.vhd ------------> Sub Module
標簽： Sram_Interface following Hardware contains
上傳時間： 2014-11-11
上傳用戶：gmh1314
Simulation of a transmitter implementingthe OFDM transmission chain with QPSK modulation on each sub-carrier
標簽： implementingthe transmission transmitter Simulation
上傳時間： 2013-12-23
上傳用戶：cainaifa
