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subsystem

  • 鄰居子系統的一些個人總結neighbour subsystem/鄰居子系統的一些個人總結neighbour subsystem

    鄰居子系統的一些個人總結neighbour subsystem/鄰居子系統的一些個人總結neighbour subsystem

    標簽: neighbour subsystem 子系統

    上傳時間: 2014-01-10

    上傳用戶:qlpqlq

  • Validate subsystem Compatibility - Source Code

    Validate subsystem Compatibility - Source Code

    標簽: Compatibility subsystem Validate Source

    上傳時間: 2016-06-11

    上傳用戶:784533221

  • This is an program for the 8051 for timer subsystem

    This is an program for the 8051 for timer subsystem

    標簽: for subsystem program timer

    上傳時間: 2017-03-30

    上傳用戶:515414293

  • The Open Radar Data Acquisition (ORDA) subsystem replaces the current WSR-88D Radar Data Acquisiti

    The Open Radar Data Acquisition (ORDA) subsystem replaces the current WSR-88D Radar Data Acquisition subsystem with improved receiver and signal processing hardware and with improved user interface, signal processing and diagnostics software. This paper will discuss the input data from the digital receiver, the ORDA signal processing, and the data output from the ORDA hardware. Specifications of the ORDA digital receiver will be presented. The paper outlines the critical radar signal processing flow and provides analysis of new spectrum width computations and clutter filtering schemes used in the ORDA system. Where appropriate, ORDA performance enhancements, data quality improvements and reliability and maintenance improvements will be highlighted.

    標簽: Radar Data Acquisition Acquisiti

    上傳時間: 2017-08-25

    上傳用戶:leixinzhuo

  • 16位高精度多輸入隔離模擬前端(AFE)

    Abstract: This document explains how the Cupertino (MAXREFDES5#) subsystem reference design meets the higher resolution, higher voltage,and isolation needs of industrial control and industrial automation applications. Hardware and firmware design files as well as FFTs andhistograms from lab measurements are provided.

    標簽: AFE 高精度 輸入 模擬前端

    上傳時間: 2013-10-21

    上傳用戶:mnacyf

  • Lakewood (MAXREFDES7#)3.3V Input, ±12V (±15V) Output Isolated Power Supply

    Abstract: This document details the Lakewood (MAXREFDES7#) subsystem reference design, a 3.3V input, ±12V (±15V) output, isolated power supply. The Lakewood reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and two wide input range and adjustable output low-dropout linear regulators (LDOs). Test results and hardware files are included.

    標簽: MAXREFDES Lakewood Isolated Output

    上傳時間: 2013-11-02

    上傳用戶:fengzimili

  • Riverside (MAXREFDES8#)3.3V Input, 12V (15V) Output Isolated Power Supply

    Abstract: This document details the Riverside (MAXREFDES8#) subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output low-dropout linear regulator (LDO). Test results and hardware files are included.

    標簽: Riverside MAXREFDES Isolated Output

    上傳時間: 2013-11-16

    上傳用戶:會稽劍客

  • 隔離電源設計手冊

    Abstract: This document details the Oceanside (MAXREFDES9#) subsystem reference design, a 3.3V to 15V input,±15V (±12V) output, isolated power supply. The Oceanside design includes a high-efficiency step-up controller, a36V H-bridge transformer driver for isolated supplies, a wide input range, and adjustable output low-dropout linearregulator (LDO). Test results and hardware files are included.  

    標簽: 隔離電源 設計手冊

    上傳時間: 2013-10-12

    上傳用戶:jinyao

  • LPC1850 Cortex-M3內核微控制器數據手冊

    The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-chip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.

    標簽: Cortex-M 1850 LPC 內核微控制器

    上傳時間: 2014-12-31

    上傳用戶:zhuoying119

  • Writing an Input Module The sample module introduced here is called idiom (Input Device for Interc

    Writing an Input Module The sample module introduced here is called idiom (Input Device for Intercepting Output of Mice), The sample module registers itself with the USB kernel subsystem as a mouse driver and with the input management subsystem as a keyboard driver. idiom translates mouse movement events into keyboard input events: it reports arrow events to the input system according to how the physical mouse is moved.

    標簽: Input introduced Writing Device

    上傳時間: 2015-06-25

    上傳用戶:731140412

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