基于DSP的三相無(wú)刷直流電機(jī)調(diào)速系統(tǒng)的研究
·【英文題名】 Research of Speed Regulate System of Three Phase BLDCM Based on DSP 【作者中文名】 劉桂芬; 【導(dǎo)師】 孟慶春; 【...
three-level技術(shù)資料
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?? 源代碼：60365
?? 電路圖：1
?? three-level全部資料 (600個(gè))
Verilog Coding Style for Efficient Digital Design
In this paper, we discuss efficient coding and design styles using verilog. This can beim...
US Navy VHDL Modelling Guide
This document was developed under the Standard Hardware and Reliability Program (SHARP) T...
電臺(tái)維修模擬訓(xùn)練系統(tǒng)設(shè)計(jì)方法研究
Methods for designing a maintenance simulation training system for certain kind of radio are introdu...
基于CORDIC算法的高速ODDFS電路設(shè)計(jì)
為了滿足現(xiàn)代高速通信中頻率快速轉(zhuǎn)換的需求，基于坐標(biāo)旋轉(zhuǎn)數(shù)字計(jì)算（CORDIC，Coordinate Rotation Digital Computer）算法完成正交直接數(shù)字頻率合成（ODDFS，Ort...
DN454 單端至差分放大器設(shè)計(jì)技巧
A fully differential amplifi er is often used to converta single-ended signal to a differ...
STM32F10xxx設(shè)備中如何得到高精度ADC
The STM32F10xxx microcontroller family embeds up to three advanced 12-bit ADCs (depending on the d...
高速放大器技術(shù)
This publication represents the largest LTC commitmentto an application note to date. No ...
相敏檢波電路鑒相特性的仿真研究
分析了調(diào)幅信號(hào)和載波信號(hào)之間的相位差與調(diào)制信號(hào)的極性的對(duì)應(yīng)關(guān)系,得出了相敏檢波電路輸出電壓的極性與調(diào)制信號(hào)的極性有對(duì)應(yīng)關(guān)系的結(jié)論。為了驗(yàn)證相敏檢波電路的這一特性,給出3 個(gè)電路方案,分別選用理想元件和...
高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf
高速數(shù)字系統(tǒng)設(shè)計(jì)下載pdf:High-Speed Digital SystemDesign—A Handbook ofInterconnect Theory and DesignPracticesSt...