·Multicarrier Communications: Lie-Liang Yang Wiley | ISBN: 0470722002 | 2009-03-03 ,696 pages Benefiting from both time-domain and frequency-domain signal processing techniques, multi
標簽： nbsp Communications Multicarrier Wiley
上傳時間： 2013-04-24
上傳用戶：prczsf
·Stanford&IBM牛人經典之作 - Digital Control of Dynamic SystemsEditorial ReviewsProduct DescriptionThis well-respected, market-leading text discusses the use of digital computers in the real-time co
標簽： nbsp Hardcover Digital Control
上傳時間： 2013-07-31
上傳用戶：cuiyashuo
· 摘要： 傳統的DSP軟件開發都是先設計DSP上的算法并仿真然后將其寫成特定DSP的代碼(c或是匯編)在目標板上實現.介紹了一種新的高效、集成的DSP軟件設計方法.利用MATLAB7.0新提供的Embeded Target for TI C2000 DSP、simulink、Real-Time Workshop和TI的CCS IDE相結合,在MATLAB環境下生成DSP的C代
上傳時間： 2013-07-26
上傳用戶：hebmuljb
英文描述： Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs 中文描述： 雙下降沿觸發主從JK觸發器明確和互補輸出
上傳時間： 2013-04-24
上傳用戶：黃華強
沒事多學習一下英語
上傳時間： 2013-10-29
上傳用戶：ukuk
Industrial systems demand semiconductors that are precise, flexibleand reliable. Linear Technology offers a broad line of high performanceanalog ICs that simplify system design with rugged devices featuringparameters fully guaranteed over the -40°C to 85°C temperature range.We back this up with knowledgeable applications support, long productlife cycles and superior on-time delivery.
上傳時間： 2013-11-02
上傳用戶：xiaodu1124
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
上傳時間： 2013-10-25
上傳用戶：banyou
The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for high-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.
上傳時間： 2013-12-20
上傳用戶：zhangxin
Abstract: For many first-time users, finding the right logger that meets their needs can be a challenging task. In simple
上傳時間： 2014-01-19
上傳用戶：縹緲
Abstract: This application note presents an overview of the operational characteristics of accurate I²C real-time clocks (RTCs),including the DS3231, DS3231M, and DS3232. It focuses on general application guidelines that facilitate use of device resources forpower management, I²C communication circuit configurations, and I²C characteristics relative to device power-up sequences andinitializations. Additional discussions on decoupling are provided to support developing strategies for mitigating power-supply pushingof device frequency.
上傳時間： 2013-11-23
上傳用戶：WMC_geophy
