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Specification for conveying ITU-R System B Teletext in DVB bitstreams
標簽： Specification bitstreams conveying Teletext
上傳時間： 2014-02-18
上傳用戶：mikesering
梯形公式計算面積近似值:In=Tn=h/2(f(a)+f(b)) 變長梯形面積:T2n=Tn/2+h/2∑f(Xk+h/2) 辛普生面積:I2n=(4T2n-Tn)/3
上傳時間： 2016-01-06
上傳用戶：qw12
b tree code for index in the database design
標簽： database design index tree
上傳時間： 2016-02-03
上傳用戶：z1191176801
I wrote this code early this year using ColdFire MCF5213 in codewarrior IDE. The LCD is STN B/W 320x240 dot matrix LCD. The code include 3 different fonts, and basic LCD driver. All original!
標簽： this codewarrior ColdFire wrote
上傳時間： 2013-12-20
上傳用戶：皇族傳媒
杭電 ACM 1002 I have a very simple problem for you. Given two integers A and B, your job is to calculate the Sum of A + B.
標簽： integers problem calcul simple
上傳時間： 2014-01-12
上傳用戶：dave520l
Thinking in C++(Second Edition) 國外經典C++原版書庫《C++編程思想(英文版.第2版)》/(美)埃克爾(Eckel,B)著 十分經典、難得！
標簽： Thinking Edition Second Eckel
上傳時間： 2016-08-17
上傳用戶：520
Data Structures and Algorithms with Object-Oriented Design Patterns in Java Bruno R. Preiss B.A.Sc., M.A.Sc., Ph.D., P.Eng. Associate Professor Department of Electrical and Computer Engineering University of Waterloo, Waterloo, Canada
標簽： B.A.S R. Object-Oriented Algorithms
上傳時間： 2017-03-07
上傳用戶：z754970244
* "Copyright (c) 2006 Robert B. Reese ("AUTHOR")" * All rights reserved. * (R. Reese, reese@ece.msstate.edu, Mississippi State University) * IN NO EVENT SHALL THE "AUTHOR" BE LIABLE TO ANY PARTY FOR * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE "AUTHOR" * HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
上傳時間： 2015-09-24
上傳用戶：mpquest
design LP,HP,B S digital Butterworth and Chebyshev filter. All array has been specified internally,so user only need to input f1,f2,f3,f4,fs(in hz), alpha1,alpha2(in db) and iband (to specify the type of to design). This program output hk(z)=bk(z)/ak(z),k=1,2,..., ksection and the freq.
標簽： Butterworth internally Chebyshev specified
上傳時間： 2015-11-08
上傳用戶：253189838
基于verilog HDL的自動售貨機控制電路設計: 可以對5種不同種類的貨物進行自動售貨,價格分別為A=1.00,B=1.50,C=1.80,D=3.10,E=5.00 。售貨機可以接受1元,5角,1角三種硬幣(即有三種輸入信號IY,IWJ,IYJ),并且在一個3位7段LED(二位代表元,一位代表角)顯示以投入的總錢數，最大9.90元，如果大于該數值，新投入的硬幣會退出,選擇貨物的輸入信號Ia,Ib,Ic,Id,Ie和一個放棄信號In,輸出指示信號為 Sa, Sb ,Sc ,Sd, Se 分別表示售出相應的貨物,同時輸出的信號yuan, jiao代表找零,相應每個脈沖代表找零相應的硬幣，上述輸入和輸出信號均是一個固定寬度的脈沖信號。
上傳時間： 2016-07-12
上傳用戶：lanwei
