幾篇最經典的運動搜索算法的IEEE論文：A1. Enhanced Hexagonal Search for Fast Block Motion Estimation；A2. Hexagon-based search pattern for fast block motion estimation；A3. Predictive Motion Vector Field Adaptive Search Technique (PMVFAST)等
標簽： Hexagon-based Estimation Hexagonal Enhanced
上傳時間： 2013-12-24
上傳用戶：小碼農lz
This document is an operation guide for the MPC8XXFADS board. It contains operational, functional and general information about the FADS. The MPC8XXFADS is meant to serve as a platform for s/ w and h/w development around the MPC8XX family processors. Using its on-board resources and its associated debugger, a developer is able to download his code, run it, set breakpoints, display memory and registers and connect his own proprietary h/w via the expansion connectors, to be incorporated to a desired system with the MPC8XX processor.
標簽： operational MPC8XXFADS functional operation
上傳時間： 2014-03-10
上傳用戶：zsjinju
=== === === === === === === === === === ==== IBM PC KEYBOARD INFORMATION FOR SOFTWARE DEVELOPERS ================================================================ Sources: PORTS.A of Ralf Brown s interrupt list collection repairfaq.org keyboard FAQ(doesn t appear to exsist) Linux source code Test hardware: New Samsung KB3T001SAXAA 104-key keyboard Old Maxi 2186035-00-21 101-key keyboard NO WARRANTY. NO GUARANTEE. I have tried to make this information accurate. I don t know if I succeeded. Corrections or additional information would be welcome. This is a plain-text document. If you use a word-processor to view it, use a fixed-pitch font (like Courier) so columnar data and ASCII art lines up properly.
標簽： INFORMATION DEVELOPERS KEYBOARD SOFTWARE
上傳時間： 2014-08-18
上傳用戶：ecooo
This the source release kit for the following system configuration(s): - AMD Alchemy(TM) DBAu1200(TM) and AMD Alchemy(TM) Pb1200(TM) development boards (AMD Alchemy(TM) Au1200(TM) processor) - Windows CE 5.0 - RMI Au1200 Core BSP v1.51 - RMI Au1200 Media BSP v1.51
標簽： configuration the following Alchemy
上傳時間： 2014-02-21
上傳用戶：lps11188
SDRAM 參考設計:主要包括The following figure shows a high-level block diagram for this reference design followed by a brief description of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge · BlockRAM Memory Controller · SDRAM Controller · Two GPIO ports · A UART Port · External SDRAM
標簽： high-level following reference diagram
上傳時間： 2013-12-15
上傳用戶：Miyuki
tda7412的資料，CARRADIO SIGNAL PROCESSOR，I2C-BUS INTERFACE
上傳時間： 2016-03-04
上傳用戶：lanhuaying
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video.
標簽： bottleneck developed the concept
上傳時間： 2014-12-03
上傳用戶：ikemada
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video. Hardware reference
標簽： bottleneck developed the concept
上傳時間： 2016-03-18
上傳用戶：極客
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video. User Manual
標簽： bottleneck developed the concept
上傳時間： 2014-01-15
上傳用戶：努力努力再努力
通過信號與系統以及數字信號處理中所學的理論知識，基于調幅和調頻的基本原理，運用產生信號的兩種基本方法，使用CCS軟件以及Digital Signal Processor實現調幅調頻信號的發生。
上傳時間： 2016-03-20
上傳用戶：lht618
