The Cryptography API: Next Generation(CNG) is a new and agile framework in Windows Vista, which implements an extensible provider model that allows you to load a provider by specifying the required cryptographic algorithm rather than having to hardcode a specific provider.
標簽： Cryptography Generation framework Windows
上傳時間： 2013-12-18
上傳用戶：semi1981
measure coin used 89c52,which use two Timers
上傳時間： 2016-10-01
上傳用戶：181992417
vmp is the file generate from Brainvoyager which can link vtc file and the 3D image. This toolbox help you to edit vmp file in matlab.
標簽： file Brainvoyager the generate
上傳時間： 2016-10-04
上傳用戶：stampede
Realize the usbip function, which could be simulate usb port through net
標簽： function simulate Realize through
上傳時間： 2014-01-17
上傳用戶：GavinNeko
A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.
標簽： simulation Verilog writing clock
上傳時間： 2016-10-12
上傳用戶：王者A
A code writing by Verilog which can find medium value. With a C file to see the simulation results. A co-design example of C and Verilog.
標簽： simulation Verilog writing results
上傳時間： 2014-11-18
上傳用戶：ljt101007
Here are two newest published articles talking about joint source channel coding, in which source coding is invovled scalable video coding. They are very useful for people who are doing research about it.
標簽： source published articles channel
上傳時間： 2013-12-03
上傳用戶：1427796291
ash script guide in which the detailed introduction is given
標簽： introduction detailed script guide
上傳時間： 2016-10-18
上傳用戶：sardinescn
Generate orthogonal Walsh codes, which can be used in wireless communications such as CDMA system.
標簽： communications orthogonal Generate wireless
上傳時間： 2014-01-14
上傳用戶：hzy5825468
JTAG Tools is a software package which enables working with JTAG-aware (IEEE 1149.1) hardware devices (parts) and boards through JTAG adapter.
標簽： JTAG-aware hardware software enables
上傳時間： 2016-10-20
上傳用戶：520
