This Verilog HDL description implements a UART.
資源簡介:This Verilog HDL description implements a UART.
上傳時間: 2013-12-17
上傳用戶:wff
資源簡介:This Verilog HDL description implements a UART Version 1.1 : Original Creation 2.1 : added comments
上傳時間: 2016-05-27
上傳用戶:1109003457
資源簡介:Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC ...
上傳時間: 2013-12-24
上傳用戶:金宜
資源簡介:This is a Verilog hdl language referance book , tell you the basic useage of This language.
上傳時間: 2016-02-06
上傳用戶:日光微瀾
資源簡介:This a Uart source code using Verilog.
上傳時間: 2016-05-19
上傳用戶:zsjzc
資源簡介:This a book about the Verilog-hdl design and circuit simulation and synthesize example
上傳時間: 2016-11-03
上傳用戶:GavinNeko
資源簡介:What is Verilog? ➥ Verilog HDL is a Hardware description Language (HDL) ➥ Verilog HDL allows describe designs at a high level of abstraction as well as the lower implementation levels ➥ Primary use of HDLs is the simul...
上傳時間: 2017-02-18
上傳用戶:
資源簡介:本文利用Verilog HDL 語言自頂向下的設計方法設計多功能數字鐘,突出了其作為硬件描述語言的良好的可讀性、可移植性和易理解等優點,并通過Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成綜合、仿真。此程序通過下載到FPGA 芯片后,可應用于實際的數字鐘顯示中...
上傳時間: 2013-11-10
上傳用戶:hz07104032
資源簡介:This driver implements a COM port interface for USB Point-of-Sale devices
上傳時間: 2013-12-22
上傳用戶:希醬大魔王
資源簡介:Lattice公司的A Verilog HDL Test Bench Primer應用手冊
上傳時間: 2015-04-25
上傳用戶:宋桃子
資源簡介:硬件uart源程序Verilog HDL,即相關文檔
上傳時間: 2015-04-25
上傳用戶:pompey
資源簡介:This example implements a gameport translator on the PIC16C765. The firmware translates a gaming device plugged into the gameport to a USB gaming device. The firmware is set up to translate the DexxaTM eight-button gamepad. Changes to...
上傳時間: 2015-04-26
上傳用戶:yyq123456789
資源簡介:UART Verilog hdl 實現
上傳時間: 2014-01-11
上傳用戶:PresidentHuang
資源簡介:This package implements a Kalman filter as described in the paper "A Statistical Algorithm for Estimating Speed from Single Loop Volume and Occupancy Measurements" by D. J. Dailey.
上傳時間: 2013-12-12
上傳用戶:cc1915
資源簡介:FPGA/CPLD應用,uart的Verilog HDL原碼
上傳時間: 2013-12-28
上傳用戶:lizhizheng88
資源簡介:是一本好書,Verilog HDL,a guide to digital design and synthesis
上傳時間: 2015-07-14
上傳用戶:熊少鋒
資源簡介:Verilog HDL Synthesis, A Practical Primer 學習Verilog HDL一本很不錯的英文書,比較透徹
上傳時間: 2016-01-19
上傳用戶:hongmo
資源簡介:占用資源少的Verilog HDL uart接口;采用固定波特率115200,可以修改程序中的分頻來修改波特率,模式為1個啟始位,8位數據位,1個停止位;帶1字節緩存;當緩存空時輸出空信號
上傳時間: 2013-12-28
上傳用戶:kikye
資源簡介:This document contains a description of the CAN Reference Model. This document is part of a set of documents that standardize the CAN Application Layer for Industrial Applications.
上傳時間: 2016-02-08
上傳用戶:yoleeson
資源簡介:實現簡單的UART功能,在QUARTUS4.0下編譯通過,采用Verilog HDL編寫.
上傳時間: 2013-12-18
上傳用戶:hfmm633
資源簡介:UART轉I2C的Verilog HDL代碼,由北京郵電大學《VerilogHDL設計與EDA技術基礎》教師編寫
上傳時間: 2014-08-03
上傳用戶:zhuoying119
資源簡介:uart串口通信程序 用Verilog HDL 編寫 可以有效應用于FPGA上
上傳時間: 2014-01-04
上傳用戶:頂得柱
資源簡介:UART實驗Verilog HDL代碼,用于FPGA
上傳時間: 2014-01-09
上傳用戶:linlin
資源簡介:(2003 prentice-hall)Verilog hdl:a guide to digital design and synthesis(2nd edition).rar
上傳時間: 2014-01-17
上傳用戶:teddysha
資源簡介:uart pci 等Verilog hdl 代碼
上傳時間: 2014-02-24
上傳用戶:waitingfy
資源簡介:基于Verilog HDL的自動售貨機控制電路設計: 可以對5種不同種類的貨物進行自動售貨,價格分別為A=1.00,B=1.50,C=1.80,D=3.10,E=5.00 。售貨機可以接受1元,5角,1角三種硬幣(即有三種輸入信號IY,IWJ,IYJ),并且在一個3位7段LED(二位代表元,一位代表角)顯示以投入...
上傳時間: 2016-07-12
上傳用戶:lanwei
資源簡介:This is a uart source written by VHDL .widely used and compatible with Whibone.
上傳時間: 2013-12-22
上傳用戶:cxl274287265
資源簡介:This file implements a pid controller used to simulator cruise control in a car The input is a throtle value between 0 - 100 ( read on P1 ) The output is the car s speed ( P2 - P0 )
上傳時間: 2014-01-01
上傳用戶:13160677563
資源簡介:This package implements a general purpose Reed-Solomon encoding and decoding facility. See the rs.3 man page for details.
上傳時間: 2017-05-08
上傳用戶:lz4v4
資源簡介:This Project implements a real-time operating system that can handle a SD/MMC Card unit
上傳時間: 2013-12-22
上傳用戶:520