Act_b0 := '0';                                RP_chk0 := NOW;                                Auto_precharge(0) := '0';                                Read_precharge(0) := '0';                                Write_precharge(0) := '0';                                RW_interrupt_write := '0';                            END IF;                        END IF;                        IF ((Auto_precharge(1) = '1') AND (Write_precharge(1) = '1')) THEN                            IF (((NOW - RAS_chk1 >= tRAS) AND                               (((Burst_length_1 = '1' OR Write_burst_mode = '1' ) AND Count_precharge(1) >= 1)  OR                                 (Burst_length_2 = '1'                             AND Count_precharge(1) >= 2)  OR                                 (Burst_length_4 = '1'                             AND Count_precharge(1) >= 4)  OR                                 (Burst_length_8 = '1'                             AND Count_precharge(1) >= 8))) OR                                  (RW_interrupt_write = '1' AND WR_chk(1) >= 1)) THEN                                Pc_b1 := '1';                                Act_b1 := '0';                                RP_chk1 := NOW;                                Auto_precharge(1) := '0';                                Read_precharge(1) := '0';                                Write_precharge(1) := '0';                                RW_interrupt_write := '0';                            END IF;                        END IF;                        -- Internal Precharge or Bst                        IF Command(0) = PRECH THEN                            IF Bank_precharge(0) = Bank OR A10_precharge(0) = '1' THEN                                IF Data_out_enable = '1' THEN                                    Data_out_enable := '0';                                END IF;                            END IF;                        ELSIF Command(0) = BST THEN                            IF Data_out_enable = '1' THEN                                Data_out_enable := '0';                            END IF;                        END IF;                        IF Data_out_enable = '0' THEN                            Dq <= TRANSPORT (OTHERS => 'Z') AFTER tOH;                        END IF;                        -- Detect Read or Write Command                        IF Command(0) = READ OR Command(0) = READ_A THEN                            Bank := Bank_addr (0);                            Col := Col_addr (0);                            Col_brst := Col_addr (0);                            IF Bank_addr (0) = '0' THEN                                Row := B0_row_addr;                            ELSE                                Row := B1_row_addr;                            END IF;                            Burst_counter := 0;                            Data_in_enable := '0';                            Data_out_enable := '1';                        ELSIF Command(0) = WRITE OR Command(0) = WRITE_A THEN                            Bank := Bank_addr(0);                            Col := Col_addr(0);                            Col_brst := Col_addr(0);                            IF Bank_addr (0) = '0' THEN                                Row := B0_row_addr;                            ELSE                                Row := B1_row_addr;                            END IF;                            Burst_counter := 0;                            Data_in_enable := '1';                            Data_out_enable := '0';                        END IF;                        -- DQ (Driver / Receiver)                        Row_index := TO_INTEGER (Row);                        Col_index := TO_INTEGER (Col);                        IF Data_in_enable = '1' THEN                            IF Dqm /= "11" THEN                                Init_mem (Bank, Row_index);                                IF Bank = '0' THEN                                    Dq_temp := Bank0 (Row_index) (Col_index);                                    IF Dqm = "01" THEN                                        Dq_temp (15 DOWNTO 8) := TO_BITVECTOR (Dq (15 DOWNTO 8));                                    ELSIF Dqm = "10" THEN                                        Dq_temp (7 DOWNTO 0) := TO_BITVECTOR (Dq (7 DOWNTO 0));                                    ELSE                                        Dq_temp (15 DOWNTO 0) := TO_BITVECTOR (Dq (15 DOWNTO 0));                                    END IF;                                    Bank0 (Row_index) (Col_index) := Dq_temp;                                ELSIF Bank = '1' THEN                                    Dq_temp := Bank1 (Row_index) (Col_index);                                    IF Dqm = "01" THEN                                        Dq_temp (15 DOWNTO 8) := TO_BITVECTOR (Dq (15 DOWNTO 8));                                    ELSIF Dqm = "10" THEN                                        Dq_temp (7 DOWNTO 0) := TO_BITVECTOR (Dq (7 DOWNTO 0));                                    ELSE                                        Dq_temp (15 DOWNTO 0) := TO_BITVECTOR (Dq (15 DOWNTO 0));                                    END IF;                                    Bank1 (Row_index) (Col_index) := Dq_temp;                                END IF;                                WR_chk(TO_INTEGER(Bank)) := 0;                            END IF;                            Burst_decode;                        ELSIF Data_out_enable = '1' THEN                            Init_mem (Bank, Row_index);                            IF Bank = '0' THEN                                Dq_temp (15 DOWNTO 0) := Bank0 (Row_index) (Col_index);                                IF Dqm_reg(0) = "00" THEN                                    Dq (15 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 0)) AFTER tAC;                                ELSIF Dqm_reg(0) = "01" THEN                                    Dq (15 DOWNTO 8)  <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 8)) AFTER tAC;                                    Dq (7 DOWNTO 0)  <= TRANSPORT (OTHERS => 'Z') AFTER tAC;                                ELSIF Dqm_reg(0) = "10" THEN                                    Dq (15 DOWNTO 8)  <= TRANSPORT (OTHERS => 'Z') AFTER tAC;                                    Dq (7 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (7 DOWNTO 0)) AFTER tAC;                                ELSE                                    Dq <= TRANSPORT (OTHERS => 'Z') AFTER tAC;                                END IF;                            ELSIF Bank = '1' THEN                                Dq_temp (15 DOWNTO 0) := Bank1 (Row_index) (Col_index);                                IF Dqm_reg(0) = "00" THEN                                    Dq (15 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 0)) AFTER tAC;                                ELSIF Dqm_reg(0) = "01" THEN                                    Dq (15 DOWNTO 8)  <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (15 DOWNTO 8)) AFTER tAC;                                    Dq (7 DOWNTO 0)  <= TRANSPORT (OTHERS => 'Z') AFTER tAC;                                ELSIF Dqm_reg(0) = "10" THEN                                    Dq (15 DOWNTO 8)  <= TRANSPORT (OTHERS => 'Z') AFTER tAC;                                    Dq (7 DOWNTO 0) <= TRANSPORT TO_STDLOGICVECTOR (Dq_temp (7 DOWNTO 0)) AFTER tAC;                                ELSE                                    Dq <= TRANSPORT (OTHERS => 'Z') AFTER tAC;                                END IF;                            END IF;                            Burst_decode;                        END IF;                        -- Checking internal wires                        Pre_chk (0) <= Pc_b0;                        Pre_chk (1) <= Pc_b1;                        Act_chk (0) <= Act_b0;                        Act_chk (1) <= Act_b1;                        Dq_in_chk   <= Data_in_enable;                        Dq_out_chk  <= Data_out_enable;                        Bank_chk    <= Bank;                        Row_chk     <= Row;                        Col_chk     <= Col;                    END IF;        END PROCESS;        -- Clock timing checks        Clock_check : PROCESS            VARIABLE Clk_low, Clk_high : TIME := 0 ns;            BEGIN                WAIT ON Clk;                    IF (Clk = '1' AND NOW >= 10 ns) THEN                        ASSERT (NOW - Clk_low >= tCL)                            REPORT "tCL violation"                            SEVERITY WARNING;                        ASSERT (NOW - Clk_high >= tCK)                            REPORT "tCK violation"                            SEVERITY WARNING;                        Clk_high := NOW;                    ELSIF (Clk = '0' AND NOW /= 0 ns) THEN                        ASSERT (NOW - Clk_high >= tCH)                            REPORT "tCH violation"                            SEVERITY WARNING;                        Clk_low := NOW;                    END IF;        END PROCESS;        -- Setup timing checks        Setup_check : PROCESS            BEGIN                WAIT ON Clk;                    IF Clk = '1' THEN                        ASSERT(Cke'LAST_EVENT >= tCKS)                            REPORT "CKE Setup time violation -- tCKS"                            SEVERITY WARNING;                        ASSERT(Cs_n'LAST_EVENT >= tCMS)                            REPORT "CS# Setup time violation -- tCMS"                            SEVERITY WARNING;                        ASSERT(Cas_n'LAST_EVENT >= tCMS)                            REPORT "CAS# Setup time violation -- tCMS"                            SEVERITY WARNING;                        ASSERT(Ras_n'LAST_EVENT >= tCMS)                            REPORT "RAS# Setup time violation -- tCMS"                            SEVERITY WARNING;                        ASSERT(We_n'LAST_EVENT >= tCMS)                            REPORT "WE# Setup time violation -- tCMS"                            SEVERITY WARNING;                        ASSERT(Dqm'LAST_EVENT >= tCMS)                            REPORT "Dqm Setup time violation -- tCMS"                            SEVERITY WARNING;                        ASSERT(Addr'LAST_EVENT >= tAS)                            REPORT "ADDR Setup time violation -- tAS"                            SEVERITY WARNING;                        ASSERT(Ba'LAST_EVENT >= tAS)                            REPORT "BA Setup time violation -- tAS"                            SEVERITY WARNING;                        ASSERT(Dq'LAST_EVENT >= tDS)                            REPORT "Dq Setup time violation -- tDS"                            SEVERITY WARNING;                    END IF;        END PROCESS;        -- Hold timing checks        Hold_check : PROCESS            BEGIN                WAIT ON Clk'DELAYED (tCKH), Clk'DELAYED (tCMH), Clk'DELAYED (tAH), Clk'DELAYED (tDH);                    IF Clk'DELAYED (tCKH) = '1' THEN                        ASSERT(Cke'LAST_EVENT > tCKH)                            REPORT "CKE Hold time violation -- tCKH"                            SEVERITY WARNING;                    END IF;                    IF Clk'DELAYED (tCMH) = '1' THEN                        ASSERT(Cs_n'LAST_EVENT > tCMH)                            REPORT "CS# Hold time violation -- tCMH"                            SEVERITY WARNING;                        ASSERT(Cas_n'LAST_EVENT > tCMH)                            REPORT "CAS# Hold time violation -- tCMH"                            SEVERITY WARNING;                        ASSERT(Ras_n'LAST_EVENT > tCMH)                            REPORT "RAS# Hold time violation -- tCMH"                            SEVERITY WARNING;                        ASSERT(We_n'LAST_EVENT > tCMH)                            REPORT "WE# Hold time violation -- tCMH"                            SEVERITY WARNING;                        ASSERT(Dqm'LAST_EVENT > tCMH)                            REPORT "Dqm Hold time violation -- tCMH"                            SEVERITY WARNING;                    END IF;                    IF Clk'DELAYED (tAH) = '1' THEN                        ASSERT(Addr'LAST_EVENT > tAH)                            REPORT "ADDR Hold time violation -- tAH"                            SEVERITY WARNING;                        ASSERT(Ba'LAST_EVENT > tAH)                            REPORT "BA Hold time violation -- tAH"                            SEVERITY WARNING;                    END IF;                    IF Clk'DELAYED (tDH) = '1' THEN                        ASSERT(Dq'LAST_EVENT > tDH)                            REPORT "DQ Hold time violation -- tDH"                            SEVERITY WARNING;                    END IF;        END PROCESS;END behave;