?? ins_rom.vhd
字號:
--core_design
--instruction memory
--all right reserved
--rom tyoe
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;
package rom_pack is
constant rom_high:integer:=320;
subtype rom_range is integer range 0 to rom_high;
subtype rom_word is std_logic_vector(7 downto 0);
type rom_type is array(rom_range) of rom_word;
constant rom:rom_type:=(
("00000000"),("00000000"),("00000000"),("10110000"),("00000001"),("00000000"),("00000000"),("10110000"),
("00000010"),("00000000"),("00000000"),("10110000"),("00000011"),("00000000"),("00000000"),("10110000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000001"),("00000000"),("11100101"),("10110100"),("00000010"),("00000000"),("10100111"),("10110100"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00001000"),("10100111"),("10000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000110"),("00000000"),("00000001"),("10110000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),("00000000"),
("00000000"));
end rom_pack;
library ieee;
use ieee.std_logic_1164.all;
use work.rom_pack.all;
entity ins_rom is
generic(ins_rom_delay:time:=3 ns);
port(clk:in std_logic;
a:in std_logic_vector(31 downto 0);
readdata:out std_logic_vector(31 downto 0)
);
end ins_rom;
architecture mem_core of ins_rom is
function logic2int(din:std_logic_vector(7 downto 0)) return rom_range is
variable result:rom_range:=0;
begin
for i in 0 to 7 loop
if din(i)='1' then
result:=result+2**i;
end if;
end loop;
return result;
end logic2int;
begin
process(clk)
variable b:rom_range;
begin
if clk'event and clk='1' then
if logic2int(a(7 downto 0))>320 then
b:=320;
else
b:=logic2int(a(7 downto 0));
end if;
readdata(7 downto 0)<=rom(b) after ins_rom_delay;
readdata(15 downto 8)<=rom(b+1) after ins_rom_delay;
readdata(23 downto 16)<=rom(b+2) after ins_rom_delay;
readdata(31 downto 24)<=rom(b+3) after ins_rom_delay;
end if;
end process;
end mem_core;
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