Synthesizing work.cpu.core
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":217:29:217:31|Signal clk in the sensitivity list is not used in the process
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":303:4:303:10|Incomplete sensitivity list - assuming completeness
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":305:5:305:9|Referenced variable reset is not in sensitivity list
Synthesizing work.mux2_1.b
Post processing for work.mux2_1.b
Synthesizing work.dram.sl
Post processing for work.dram.sl
@N:"D:\MY DOCUMENTS\New Folder (4)\data_rom.vhd":49:18:49:27|Found RAM dram_array, depth=31, width=32
Synthesizing work.mux4_1.b
Post processing for work.mux4_1.b
Synthesizing work.opt.d
Post processing for work.opt.d
Synthesizing work.control.ctl
Post processing for work.control.ctl
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal aluop(2 downto 0), probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal regwrite, probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal pcsource, probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal inv_in2, probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal memread, probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal memwrite, probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal memtoreg, probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|All reachable assignments to alusrcb(0) assign '0', register removed by optimization
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|All reachable assignments to alusrcb(1) assign '0', register removed by optimization
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|All reachable assignments to alusrca(0) assign '0', register removed by optimization
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|All reachable assignments to alusrca(1) assign '0', register removed by optimization
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal alusrc, probably caused by a missing assignment in an if or case stmt
@W:"D:\MY DOCUMENTS\New Folder (4)\control.vhd":29:2:29:3|Latch generated from process for signal regdst, probably caused by a missing assignment in an if or case stmt
Synthesizing work.alu.rev2
Post processing for work.alu.rev2
@W:"D:\MY DOCUMENTS\New Folder (4)\alu.vhd":50:2:50:3|All reachable assignments to cin assign '1', register removed by optimization
Synthesizing work.ins_rom.mem_core
Post processing for work.ins_rom.mem_core
Post processing for work.cpu.core
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <0> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <1> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <2> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <3> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <4> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <5> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <6> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <7> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <8> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <9> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <10> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <11> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <12> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <13> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <14> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <15> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <16> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <17> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <18> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <19> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <20> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <21> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <22> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <23> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <24> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <25> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <26> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <27> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <28> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <29> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <30> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":178:7:178:10|Bit <31> of signal jump is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <0> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <1> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <2> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <3> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <4> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <5> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <6> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <7> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <8> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <9> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <10> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <11> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <12> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <13> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <14> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <15> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <16> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <17> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <18> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <19> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <20> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <21> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <22> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <23> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <24> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <25> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <26> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <27> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <28> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <29> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <30> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":175:7:175:12|Bit <31> of signal nodata is floating
@W:"D:\MY DOCUMENTS\New Folder (4)\coreofCPU.vhd":46:8:46:14|ifid_in.cm_hw_int is not assigned a value (floating)