{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Mar 28 09:14:22 2006 " "Info: Processing started: Tue Mar 28 09:14:22 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off m74148a -c m74148a " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off m74148a -c m74148a" {  } {  } 0}
{ "Info" "IMPP_MPP_AVAILABLE_IO_STANDARD_IN_DEVICE" "EP1S10F484C5 " "Info: Auto device selection -- successful I/O standard check for EP1S10F484C5" {  } {  } 0}
{ "Info" "IMPP_MPP_AVAILABLE_PCI_IO_IN_DEVICE" "EP1S10F484C5 " "Info: Auto device selection -- successful PCI I/O clamp diode check for EP1S10F484C5" {  } {  } 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "m74148a EP1S10F484C5 " "Info: Automatically selected device EP1S10F484C5 for design m74148a" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1S20F484C5 " "Info: Device EP1S20F484C5 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "14 14 " "Info: No exact pin location assignment(s) for 14 pins of 14 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "a2 " "Info: Pin a2 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "a2" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { a2 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { a2 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "a1 " "Info: Pin a1 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "a1" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { a1 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { a1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "a0 " "Info: Pin a0 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "a0" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { a0 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { a0 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "gs " "Info: Pin gs not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "gs" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { gs } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { gs } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "eo " "Info: Pin eo not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 3 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "eo" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { eo } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { eo } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ei " "Info: Pin ei not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ei" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { ei } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { ei } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i5 " "Info: Pin i5 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i5" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i5 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i5 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i4 " "Info: Pin i4 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i4" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i4 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i4 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i7 " "Info: Pin i7 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i7" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i7 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i7 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i6 " "Info: Pin i6 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i6" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i6 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i6 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i3 " "Info: Pin i3 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i3" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i3 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i3 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i2 " "Info: Pin i2 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i2" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i2 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i2 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i1 " "Info: Pin i1 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i1" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i1 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "i0 " "Info: Pin i0 not assigned to an exact location on the device" {  } { { "m74148a.v" "" { Text "D:/my designs/m74148a/m74148a.v" 2 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "i0" } } } } { "D:/my designs/m74148a/db/m74148a_cmp.qrpt" "" { Report "D:/my designs/m74148a/db/m74148a_cmp.qrpt" Compiler "m74148a" "UNKNOWN" "V1" "D:/my designs/m74148a/db/m74148a.quartus_db" { Floorplan "D:/my designs/m74148a/" "" "" { i0 } "NODE_NAME" } "" } } { "D:/my designs/m74148a/m74148a.fld" "" { Floorplan "D:/my designs/m74148a/m74148a.fld" "" "" { i0 } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Start inferring scan chains for DSP blocks" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Inferring scan chains for DSP blocks is complete" {  } {  } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0}