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?? cf_interleaver_7_8.c

?? interleaver即交織器
?? C
字號:
////  Copyright (c) 2003 Launchbird Design Systems, Inc.//  All rights reserved.//  //  Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met://    Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.//    Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.//  //  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,//  INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.//  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,//  OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;//  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT//  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.//  //  //  Overview://  //    Memory interleavers are often used in DSP for reordering continuous streaming data.//    The interleaver is comprised of two interleaving memories.  One memory loads and//    reorders data, while the other memory dumps the data to the output.//    Once loading and dumping of data are complete, the memories reverse roles.//    The dumping memory continuously cycles though the entire memory starting at address 0.//  //  Interface://  //    Synchronization://      clock_c  : Clock input.//  //    Inputs://      swap_i   : Swap signal to interleave memories.  Pulse occurs one frame before the switch//                 and may coincide with the last input data.//      write_i  : Write enable for input data.//      addr_i   : Address for input data.//      data_i   : Input data.//  //    Outputs://      sync_primary_o    : Output sync plus occurs one frame before data new dump.//      sync_secondary_o  : Secondary sync plus occurs one frame before data at address 0 is dumped.//      data_o            : Output data.//  //  Built In Parameters://  //    Address Width  = 7//    Data Width     = 8//  //  //  //  //  Generated by Confluence 0.6.3  --  Launchbird Design Systems, Inc.  --  www.launchbird.com//  //  Build Date : Fri Aug 22 09:32:54 CDT 2003//  //  Interface//  //    Build Name    : cf_interleaver_7_8//    Clock Domains : clock_c  //    Vector Input  : swap_i(1)//    Vector Input  : write_i(1)//    Vector Input  : addr_i(7)//    Vector Input  : data_i(8)//    Vector Output : sync_primary_o(1)//    Vector Output : sync_secondary_o(1)//    Vector Output : data_o(8)//  //  //  #include <stdio.h>#include <stdlib.h>#include <time.h>#include "cf_interleaver_7_8.h"static unsigned char n84[1];static unsigned char *sync_primary_o;static unsigned char n79[1];static unsigned char n58[1];static unsigned char n28[1];static unsigned char n27[1];static unsigned char n26[1];static unsigned char n25[1];static unsigned char n22[1];static unsigned char n21[1];static unsigned char n20[1];static unsigned char n19[1];static unsigned char n18[1];static unsigned char n17[1];static unsigned char n16[1];static unsigned char n7[1];static unsigned char *data_i;static unsigned char *addr_i;static unsigned char *write_i;static unsigned char *swap_i;static unsigned char n2[1];static unsigned char n1[1];static unsigned char *data_o;static unsigned char n59[1];static unsigned char n57[1];static unsigned char n57r[1];static unsigned char n57e[1];static unsigned char n57d[1];static unsigned char n32[1];static unsigned char n10[1];static unsigned char *sync_secondary_o;static unsigned char n45[1];static unsigned char n44[1];static unsigned char n35[1];static unsigned char n34[1];static unsigned char n33[1];static unsigned char n15[1];static unsigned char n15r[1];static unsigned char n15e[1];static unsigned char n15d[1];static unsigned char n48[1];static unsigned char n36[1];static unsigned char n49[1];static unsigned char n37[1];static unsigned char n66[1];static unsigned char n50[1];static unsigned char n38[1];static unsigned char n78[1];static unsigned char n78r[1];static unsigned char n78e[1];static unsigned char n78d[1];static unsigned char n71[1];static unsigned char n71e[1];static unsigned char n71w[1];static unsigned char n71aw[1];static unsigned char n71ar[1];static unsigned char n71dw[1];static unsigned char n71m[128];static unsigned char n60[1];static unsigned char n43[1];static unsigned char n43r[1];static unsigned char n43e[1];static unsigned char n43d[1];static unsigned char n65[1];static unsigned char n65e[1];static unsigned char n65w[1];static unsigned char n65aw[1];static unsigned char n65ar[1];static unsigned char n65dw[1];static unsigned char n65m[128];void cf_interleaver_7_8_ports(unsigned char* port_swap_i, unsigned char* port_write_i, unsigned char* port_addr_i, unsigned char* port_data_i, unsigned char* port_sync_primary_o, unsigned char* port_sync_secondary_o, unsigned char* port_data_o) {  swap_i = port_swap_i;  write_i = port_write_i;  addr_i = port_addr_i;  data_i = port_data_i;  sync_primary_o = port_sync_primary_o;  sync_secondary_o = port_sync_secondary_o;  data_o = port_data_o;}void cf_interleaver_7_8_calc() {  n84[0] = 1;  sync_primary_o[0] = n57[0];  if (n78[0]) {    n79[0] = n71[0];  }  else {    n79[0] = n65[0];  }  n58[0] = 0;  n28[0] = 2;  n27[0] = 0;  n26[0] = 0;  n25[0] = 0;  n22[0] = 1;  n21[0] = 2;  n20[0] = 0;  n19[0] = 0;  n18[0] = 1;  n17[0] = 1;  n16[0] = 0;  n7[0] = 1;  n2[0] = 0;  n1[0] = 1;  data_o[0] = n79[0];  n59[0] = n15[0] == n58[0] ? 1 : 0;  n57r[0] = n2[0];  n57e[0] = n1[0];  n57d[0] = swap_i[0];  n32[0] = 255 & (swap_i[0] << 1 | n43[0]);  { unsigned int tmp; (tmp = (unsigned int) n15[0] + (unsigned int) n7[0], n10[0] = 127 & (unsigned char) tmp); }  sync_secondary_o[0] = n59[0];  n45[0] = n32[0] == n28[0] ? 1 : 0;  n44[0] = n32[0] == n27[0] ? 1 : 0;  n35[0] = n32[0] == n22[0] ? 1 : 0;  n34[0] = n32[0] == n21[0] ? 1 : 0;  n33[0] = n32[0] == n20[0] ? 1 : 0;  n15r[0] = swap_i[0];  n15e[0] = n1[0];  n15d[0] = n10[0];  if (n45[0]) {    n48[0] = n25[0];  }  else {    n48[0] = n84[0];  }  if (n35[0]) {    n36[0] = n17[0];  }  else {    n36[0] = n16[0];  }  if (n44[0]) {    n49[0] = n26[0];  }  else {    n49[0] = n48[0];  }  if (n34[0]) {    n37[0] = n18[0];  }  else {    n37[0] = n36[0];  }  n66[0] = write_i[0] & n49[0];  n50[0] = 1 & ~n49[0];  if (n33[0]) {    n38[0] = n19[0];  }  else {    n38[0] = n37[0];  }  n78r[0] = n2[0];  n78e[0] = n1[0];  n78d[0] = n50[0];  n71e[0] = n1[0];  n71w[0] = n66[0];  n71aw[0] = addr_i[0];  n71ar[0] = n15[0];  n71dw[0] = data_i[0];  n60[0] = write_i[0] & n50[0];  n43r[0] = n2[0];  n43e[0] = n1[0];  n43d[0] = n38[0];  n65e[0] = n1[0];  n65w[0] = n60[0];  n65aw[0] = addr_i[0];  n65ar[0] = n15[0];  n65dw[0] = data_i[0];}void cf_interleaver_7_8_init() {  n84[0] = 0;  n79[0] = 0;  n58[0] = 0;  n28[0] = 0;  n27[0] = 0;  n26[0] = 0;  n25[0] = 0;  n22[0] = 0;  n21[0] = 0;  n20[0] = 0;  n19[0] = 0;  n18[0] = 0;  n17[0] = 0;  n16[0] = 0;  n7[0] = 0;  n2[0] = 0;  n1[0] = 0;  n59[0] = 0;  n57[0] = 0;  n57r[0] = 0;  n57e[0] = 0;  n57d[0] = 0;  n32[0] = 0;  n10[0] = 0;  n45[0] = 0;  n44[0] = 0;  n35[0] = 0;  n34[0] = 0;  n33[0] = 0;  n15[0] = 0;  n15r[0] = 0;  n15e[0] = 0;  n15d[0] = 0;  n48[0] = 0;  n36[0] = 0;  n49[0] = 0;  n37[0] = 0;  n66[0] = 0;  n50[0] = 0;  n38[0] = 0;  n78[0] = 0;  n78r[0] = 0;  n78e[0] = 0;  n78d[0] = 0;  n71[0] = 0;  n71e[0] = 0;  n71w[0] = 0;  n71aw[0] = 0;  n71ar[0] = 0;  n71dw[0] = 0;  { int index; for (index = 128; index > 0;) n71m[--index] = 0; }  n60[0] = 0;  n43[0] = 0;  n43r[0] = 0;  n43e[0] = 0;  n43d[0] = 0;  n65[0] = 0;  n65e[0] = 0;  n65w[0] = 0;  n65aw[0] = 0;  n65ar[0] = 0;  n65dw[0] = 0;  { int index; for (index = 128; index > 0;) n65m[--index] = 0; }  cf_interleaver_7_8_calc();}void cf_interleaver_7_8_cycle_clock(){  if (n15r[0]) {    n15[0] = 0;  }  else if (n15e[0]) {    n15[0] = n15d[0];  }  if (n43r[0]) {    n43[0] = 0;  }  else if (n43e[0]) {    n43[0] = n43d[0];  }  if (n57r[0]) {    n57[0] = 0;  }  else if (n57e[0]) {    n57[0] = n57d[0];  }  if (n65e[0]) {    if (n65w[0]) {      { int base = 1 * (((unsigned int) n65aw[0])); n65m[base] = n65dw[0]; }    }    { int base = 1 * (((unsigned int) n65ar[0])); n65[0] = n65m[base]; }  }  if (n71e[0]) {    if (n71w[0]) {      { int base = 1 * (((unsigned int) n71aw[0])); n71m[base] = n71dw[0]; }    }    { int base = 1 * (((unsigned int) n71ar[0])); n71[0] = n71m[base]; }  }  if (n78r[0]) {    n78[0] = 0;  }  else if (n78e[0]) {    n78[0] = n78d[0];  }}static FILE* sim_file;static int sim_count;static unsigned char sim_swap_i[1];static unsigned char sim_write_i[1];static unsigned char sim_addr_i[1];static unsigned char sim_data_i[1];static unsigned char sim_sync_primary_o[1];static unsigned char sim_sync_secondary_o[1];static unsigned char sim_data_o[1];void cf_interleaver_7_8_sim_init(const char* file) {  time_t date = time(NULL);  sim_count = 1;  cf_interleaver_7_8_init();  sim_swap_i[0] = swap_i[0];  sim_write_i[0] = write_i[0];  sim_addr_i[0] = addr_i[0];  sim_data_i[0] = data_i[0];  sim_sync_primary_o[0] = sync_primary_o[0];  sim_sync_secondary_o[0] = sync_secondary_o[0];  sim_data_o[0] = data_o[0];  sim_file = fopen(file, "w");  fprintf(sim_file,    "$date\n  %s$end\n"    "$version\n  Confluence 0.6.3 -- Launchbird Design Systems, Inc.\n$end\n"    "$timescale\n  1 ns\n$end\n"    "$scope module cf_interleaver_7_8 $end\n"    "$var wire 1 ! swap_i $end\n"    "$var wire 1 \" write_i $end\n"    "$var wire 7 # addr_i $end\n"    "$var wire 8 $ data_i $end\n"    "$var wire 1 %% sync_primary_o $end\n"    "$var wire 1 & sync_secondary_o $end\n"    "$var wire 8 ' data_o $end\n"    "$upscope $end\n"    "$enddefinitions $end\n"    "#0\n"    "$dumpvars\n", asctime(localtime(&date)));  fprintf(sim_file, swap_i[0] ? "1!\n" : "0!\n");  fprintf(sim_file, write_i[0] ? "1\"\n" : "0\"\n");  {    int bit;    int byte;    int found = 0;    for (byte = 0; byte >= 0; byte--) {      for (bit = 128; bit >= 1; bit /= 2) {        if (found)          fprintf(sim_file, (bit & addr_i[byte]) ? "1" : "0");        else if (bit & addr_i[byte]) {          found = 1;          fprintf(sim_file, "b1");        }      }    }    if (!found)      fprintf(sim_file, "b0");    fprintf(sim_file, " #\n");  }  {    int bit;    int byte;    int found = 0;    for (byte = 0; byte >= 0; byte--) {      for (bit = 128; bit >= 1; bit /= 2) {        if (found)          fprintf(sim_file, (bit & data_i[byte]) ? "1" : "0");        else if (bit & data_i[byte]) {          found = 1;          fprintf(sim_file, "b1");        }      }    }    if (!found)      fprintf(sim_file, "b0");    fprintf(sim_file, " $\n");  }  fprintf(sim_file, sync_primary_o[0] ? "1%%\n" : "0%%\n");  fprintf(sim_file, sync_secondary_o[0] ? "1&\n" : "0&\n");  {    int bit;    int byte;    int found = 0;    for (byte = 0; byte >= 0; byte--) {      for (bit = 128; bit >= 1; bit /= 2) {        if (found)          fprintf(sim_file, (bit & data_o[byte]) ? "1" : "0");        else if (bit & data_o[byte]) {          found = 1;          fprintf(sim_file, "b1");        }      }    }    if (!found)      fprintf(sim_file, "b0");    fprintf(sim_file, " '\n");  }  fprintf(sim_file, "$end\n");}void cf_interleaver_7_8_sim_end() {  fprintf(sim_file, "#%d\n", sim_count);  fclose(sim_file);}void cf_interleaver_7_8_sim_sample() {  int changed = 0;  if (sim_swap_i[0] != swap_i[0]) {    if (!changed) { changed = 1; fprintf(sim_file, "#%d\n", sim_count); }    fprintf(sim_file, swap_i[0] ? "1!\n" : "0!\n");    sim_swap_i[0] = swap_i[0];  }  if (sim_write_i[0] != write_i[0]) {    if (!changed) { changed = 1; fprintf(sim_file, "#%d\n", sim_count); }    fprintf(sim_file, write_i[0] ? "1\"\n" : "0\"\n");    sim_write_i[0] = write_i[0];  }  if (sim_addr_i[0] != addr_i[0]) {    if (!changed) { changed = 1; fprintf(sim_file, "#%d\n", sim_count); }    {      int bit;      int byte;      int found = 0;      for (byte = 0; byte >= 0; byte--) {        for (bit = 128; bit >= 1; bit /= 2) {          if (found)            fprintf(sim_file, (bit & addr_i[byte]) ? "1" : "0");          else if (bit & addr_i[byte]) {            found = 1;            fprintf(sim_file, "b1");          }        }      }      if (!found)        fprintf(sim_file, "b0");      fprintf(sim_file, " #\n");    }    sim_addr_i[0] = addr_i[0];  }  if (sim_data_i[0] != data_i[0]) {    if (!changed) { changed = 1; fprintf(sim_file, "#%d\n", sim_count); }    {      int bit;      int byte;      int found = 0;      for (byte = 0; byte >= 0; byte--) {        for (bit = 128; bit >= 1; bit /= 2) {          if (found)            fprintf(sim_file, (bit & data_i[byte]) ? "1" : "0");          else if (bit & data_i[byte]) {            found = 1;            fprintf(sim_file, "b1");          }        }      }      if (!found)        fprintf(sim_file, "b0");      fprintf(sim_file, " $\n");    }    sim_data_i[0] = data_i[0];  }  if (sim_sync_primary_o[0] != sync_primary_o[0]) {    if (!changed) { changed = 1; fprintf(sim_file, "#%d\n", sim_count); }    fprintf(sim_file, sync_primary_o[0] ? "1%%\n" : "0%%\n");    sim_sync_primary_o[0] = sync_primary_o[0];  }  if (sim_sync_secondary_o[0] != sync_secondary_o[0]) {    if (!changed) { changed = 1; fprintf(sim_file, "#%d\n", sim_count); }    fprintf(sim_file, sync_secondary_o[0] ? "1&\n" : "0&\n");    sim_sync_secondary_o[0] = sync_secondary_o[0];  }  if (sim_data_o[0] != data_o[0]) {    if (!changed) { changed = 1; fprintf(sim_file, "#%d\n", sim_count); }    {      int bit;      int byte;      int found = 0;      for (byte = 0; byte >= 0; byte--) {        for (bit = 128; bit >= 1; bit /= 2) {          if (found)            fprintf(sim_file, (bit & data_o[byte]) ? "1" : "0");          else if (bit & data_o[byte]) {            found = 1;            fprintf(sim_file, "b1");          }        }      }      if (!found)        fprintf(sim_file, "b0");      fprintf(sim_file, " '\n");    }    sim_data_o[0] = data_o[0];  }  sim_count++;}

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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