#include "hello7.h"#include <stdio.h>/* Hardware dependant constants */#define MASTER 0#define CMPLXMSTTGT 0#define DMACTRL_EN 0#define SDRAMEN 0struct pciahb {	volatile unsigned int ahbaddr[512];};struct intahb {	volatile unsigned int ahbaddr[8192];};main(){/*  struct pciahb *config = (struct pciahb *) 0xFFF10000; */  struct pciahb *pci = (struct pciahb *) 0xF0080500;  struct pciahb *pci2 = (struct pciahb *) 0xF4080500;  volatile unsigned int *pbar = (volatile unsigned int *) 0xF0100000;  struct pciahb *config = (struct pciahb *) 0xFFF10000;  struct pciahb *io = (struct pciahb *) 0xFFF00000;  struct pciahb *membar = (struct pciahb *) 0x80000000;  struct pciahb *pcibar = (struct pciahb *) 0x80000400;  struct pciahb *dmabar = (struct pciahb *) 0x80000500;  struct intahb *sram = (struct intahb *) 0x40080000;  struct intahb *sdram = (struct intahb *) 0x60000000;  struct pciahb *trace = (struct pciahb *) 0x80010000;  struct pciahb *apb = (struct pciahb *) 0xF0000500;  volatile char *pcwt = (volatile char *) 0xF0080504;  volatile short *pswt = (volatile short *) 0xF0080508;  volatile long pcimap = 0;  volatile long pcidev[21][7];	volatile int svari,i,j,k,fel,ordnr[512],slot,skriv[256],las[256];  volatile int confr[21][11];  volatile short vend,dev;	volatile short svars;	volatile char svarc;  /* Are we system controller? */  if(MASTER){    if(CMPLXMSTTGT){      if((pcibar->ahbaddr[0] & 0x2000) != 0){        confr[0][0] = config->ahbaddr[DEVID | VENDID];        config->ahbaddr[COMMAND] = config->ahbaddr[COMMAND] | MEMSPACE;        config->ahbaddr[CLS] = config->ahbaddr[CLS] | (SET & MCLS);        config->ahbaddr[BAR0] = SET;        config->ahbaddr[BAR1] = SET;        config->ahbaddr[BAR0] = ~(config->ahbaddr[BAR0]) + 1;        config->ahbaddr[BAR1] = ~(config->ahbaddr[BAR1]) + 1;        pcimap += (config->ahbaddr[BAR1]);        pcimap += pcimap;        for(i=1;i<22;i++){          confr[i][1] = config->ahbaddr[i << 9];          if((pcibar->ahbaddr[0] & (0x100)) != 0){            confr[i][1] = 0;          }          else {            config->ahbaddr[(i << 9) | COMMAND] = (IOSPACE | MEMSPACE | BUSMASTER | MWIE);            config->ahbaddr[(i << 9) | CLS] = config->ahbaddr[(i << 9) | CLS] | (SET & MCLS);            config->ahbaddr[(i << 9) | BAR0] = SET;            config->ahbaddr[(i << 9) | BAR1] = SET;            config->ahbaddr[(i << 9) | BAR2] = SET;            config->ahbaddr[(i << 9) | BAR3] = SET;            config->ahbaddr[(i << 9) | BAR4] = SET;            config->ahbaddr[(i << 9) | BAR5] = SET;            config->ahbaddr[(i << 9) | BAR0] = ~(config->ahbaddr[(i << 9) | (BAR0 + (j-1))]) + 1;            for(j=1;j<=5;j++){              pcidev[i][j] = (config->ahbaddr[(i << 9) | (BAR0 + (j-1))]);              pcidev[i][j+1] = ~(config->ahbaddr[(i << 9) | (BAR0 + j)]) + 1;              if (pcidev[i][j+1] != 0){                if ((pcidev[i][j+1] < pcidev[i][j])){                  config->ahbaddr[(i << 9) | (BAR0 + (j-1))] = pcimap;                  pcidev[i][j] = pcimap;                  pcimap += pcidev[i][j];                  config->ahbaddr[(i << 9) | (BAR0 + j)] = pcimap;                  pcidev[i][j+1] = pcimap;                  pcimap += pcidev[i][j];                }                else {                  config->ahbaddr[(i << 9) | (BAR0 + (j-1))] = pcimap;                  pcidev[i][j] = pcimap;                  pcimap += pcidev[i][j+1];                  config->ahbaddr[(i << 9) | (BAR0 + j)] = pcimap;                  pcidev[i][j+1] = pcimap;                  pcimap += pcidev[i][j+1];                }              }            }          }        }      }      else{        while((pcibar->ahbaddr[0] & (0x1000)) == 0){}      }      while((pcibar->ahbaddr[0] & (0x1000)) == 0){}      slot = (pcibar->ahbaddr[1] & 0xF0000000) >> 28;      printf("LEON3 running on slot %d\n\n",slot);      pcibar->ahbaddr[0] = 0x70000000;      pcibar->ahbaddr[4] = 0x4 << 28;      *pbar = 0x6 << 28;      trace->ahbaddr[0] = 0xFFFF0000;      trace->ahbaddr[2] = 0x70000000;      trace->ahbaddr[4] = 500;      trace->ahbaddr[7] = 1;      trace->ahbaddr[5] = 1;/*      if(slot == 4){        pcibar->ahbaddr[0] = 0x50000000;        *pbar = 0x8 << 28;        while(1){svari = apb->ahbaddr[0];}      } */    }    else{      printf("LEON3 running on slot 6\n\n");      io->ahbaddr[0] = 0x7 << 28;    }    if(DMACTRL_EN){      if((pcibar->ahbaddr[0] & 0x2000) != 0){        for(i=1;i<22;i++){          if (confr[i][1] != 0){            dmabar->ahbaddr[3] = 7000;            dmabar->ahbaddr[2] = pcidev[i][1];            dmabar->ahbaddr[1] = 0x4 << 28;            dmabar->ahbaddr[0] = (dmabar->ahbaddr[0] & 0xFFFFFFFD) | 0x83;            while((dmabar->ahbaddr[0] & (0xC)) == 0){}            if ((dmabar->ahbaddr[0] & (0x8)) != 0){              printf("Failure when writing on PCI.\nPCI address: %X\nAHB address: %X\nDMA access aborted!\n\n",dmabar->ahbaddr[2],dmabar->ahbaddr[1]);            }            dmabar->ahbaddr[0] = dmabar->ahbaddr[0] | (0xC);            dmabar->ahbaddr[3] = 7000;            dmabar->ahbaddr[2] = pcidev[i][1];            dmabar->ahbaddr[1] = 0x4 << 28;            dmabar->ahbaddr[0] = (dmabar->ahbaddr[0] & 0xFFFFFFFD) | 0x81;            while((dmabar->ahbaddr[0] & (0xC)) == 0){}            if ((dmabar->ahbaddr[0] & (0x8)) != 0){              printf("Failure when reading from PCI.\nPCI address: %X\nAHB address: %X\nDMA access aborted!\n\n",dmabar->ahbaddr[2],dmabar->ahbaddr[1]);            }          }        }      }      else{        if(SDRAMEN){          dmabar->ahbaddr[3] = 1050;          dmabar->ahbaddr[2] = 0x7 << 28;          dmabar->ahbaddr[1] = 0x6 << 28;          dmabar->ahbaddr[0] = (dmabar->ahbaddr[0] & 0xFFFFFFFD) | 0x81;          while((dmabar->ahbaddr[0] & (0xC)) == 0){}          if ((dmabar->ahbaddr[0] & (0x8)) != 0){            printf("Failure when writing on PCI.\nPCI address: %X\nAHB address: %X\nDMA access aborted!\n\n",dmabar->ahbaddr[2],dmabar->ahbaddr[1]);          }          dmabar->ahbaddr[0] = dmabar->ahbaddr[0] | (0xC);          dmabar->ahbaddr[3] = 1050;          dmabar->ahbaddr[2] = 0x7008 << 16;          dmabar->ahbaddr[1] = 0x6 << 28;          dmabar->ahbaddr[0] = (dmabar->ahbaddr[0] & 0xFFFFFFFD) | 0x83;          while((dmabar->ahbaddr[0] & (0xC)) == 0){}          if ((dmabar->ahbaddr[0] & (0x8)) != 0){            printf("Failure when reading from PCI.\nPCI address: %X\nAHB address: %X\nDMA access aborted!\n\n",dmabar->ahbaddr[2],dmabar->ahbaddr[1]);          }        }        dmabar->ahbaddr[3] = 1050;        dmabar->ahbaddr[2] = 0x7 << 28;        dmabar->ahbaddr[1] = 0x4008 << 16;        dmabar->ahbaddr[0] = (dmabar->ahbaddr[0] & 0xFFFFFFFD) | 0x81;        while((dmabar->ahbaddr[0] & (0xC)) == 0){}        if ((dmabar->ahbaddr[0] & (0x8)) != 0){          printf("Failure when writing on PCI.\nPCI address: %X\nAHB address: %X\nDMA access aborted!\n\n",dmabar->ahbaddr[2],dmabar->ahbaddr[1]);        }        dmabar->ahbaddr[0] = dmabar->ahbaddr[0] | (0xC);        dmabar->ahbaddr[3] = 1050;        dmabar->ahbaddr[2] = 0x7008 << 16;        dmabar->ahbaddr[1] = 0x4008 << 16;        dmabar->ahbaddr[0] = (dmabar->ahbaddr[0] & 0xFFFFFFFD) | 0x83;        while((dmabar->ahbaddr[0] & (0xC)) == 0){}        if ((dmabar->ahbaddr[0] & (0x8)) != 0){          printf("Failure when reading from PCI.\nPCI address: %X\nAHB address: %X\nDMA access aborted!\n\n",dmabar->ahbaddr[2],dmabar->ahbaddr[1]);        }        fel = 0;  /*      sram->ahbaddr[1] = 0x12345678; */        for(i=0;i<256;i++){          if(sram->ahbaddr[i] != sdram->ahbaddr[i]){            fel++;            ordnr[i] = 1;            sram->ahbaddr[256+fel] = i;          }          else{ordnr[i]=0;}        }        if(fel > 0){          printf("There were %d failures during dma burst test on slot %d.\n\n",fel,slot);  /*        printf("There were failures during dma burst test.\n\n"); */        }        else{printf("No failures during dma burst test on slot %d.\n\n",slot);}      }    }/*    *pbar = 0x4 << 28;    fel = 0;    for(i=0;i<10;i++){      pci->ahbaddr[i] = 0xAFFE<<i;      pci2->ahbaddr[i] = 0xAFFE<<i;      svari = pci->ahbaddr[i];      if(svari != 0xAFFE<<i){fel++;skriv[i]=0xAFFE<<i;las[i]=svari;}      else{skriv[i]=0;las[i]=0;}      svari = pci2->ahbaddr[i];      if(svari != 0xAFFE<<i){fel++;skriv[i+10]=0xAFFE<<i;las[i+10]=svari;}      else{skriv[i+10]=0;las[i+10]=0;}      }    *pswt = 0x1BCD;    svars = *pswt;    if(svars != 0x1BCD){fel++;skriv[20]=0x1BCD;las[20]=(0x0000FFFF & svars);}    else{skriv[20]=0;las[20]=0;}    *pcwt = 0x1E;    svarc = *pcwt;    if(svarc != 0x1E){fel++;skriv[21]=0x1E;las[21]=(0x000000FF & svarc);}    else{skriv[21]=0;las[21]=0;}  }  else{    printf("Target only PCI running on slot 6\n\n");    io->ahbaddr[0] = 0x7 << 28;    for(i=0;i<256;i++){      pci->ahbaddr[i] = i;    }    fel = 0;    for(i=0;i<256;i++){      svari = pci->ahbaddr[i];      if(svari != i){        fel++;        skriv[i] = i;        las[i] = svari;      }      else{        skriv[i] = 0;        las[i] = 0;      }    }    if(fel>0){      printf("There were %d failures when writing/reading on slot 7\n\n",fel);    }    else{      printf("There were no failures when writing/reading on slot 7\n\n",fel);    }*/  }  while(1);  printf("Klar");}