/*
** LDF for adsp-BF561
** 
** There are a number of configuration options that can be specified
** either by compiler flags, or by linker flags directly. The options are:
** 
** USE_PROFILER0
** 	Enabled by -p. Link in profiling library, and write results to
** 	both stdout and mon.out.
** USE_PROFILER1
** 	Enabled by -p1. Only write profiling data to mon.out.
** USE_PROFILER2
** 	Enabled by -p2. Only write profiling data to stdout.
** USE_PROFILER
** 	Equivalent to USE_PROFILER0.
** __WORKAROUNDS_ENABLED
**    Defined by compiler when -workaround is used to direct LDF to
**    link with libraries that have been built with work-arounds
**    enabled.
** USE_FILEIO
**	   Always defined; enables the File I/O Support, which is necessary
**	   for printf() to produce any output.
** Builds for both Core A (p0.dxe) and Core B (p1.dxe)
** and a shared memory for the two common areas (sml2.sm) at
** the same time. Requires a main project/sub-project
** arrangement, where each sub-project generates a
** .dlb library to be linked against in the main
** project. The names of these .dlb files is fixed.
** They are: corea.dlb, coreb.dlb, sml2.dlb and sml3.dlb.
** 
*/

ARCHITECTURE(ADSP-BF561)

#ifndef __NO_STD_LIB
SEARCH_DIR( $ADI_DSP\Blackfin\lib )
#endif


/* Moving to primIO means that we must always include the FileIO support,
** so that printf() will work.
*/

#ifndef USE_FILEIO	/* { */
#define USE_FILEIO 1
#endif	/* } */

#ifdef USE_PROFILER	/* { */
#define USE_PROFILER0
#endif	/* } */

#ifdef USE_PROFILER0	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define PROFFLAG prfflg0_561y.doj
#else
#define PROFFLAG prfflg0_561.doj
#endif	/* } */
// The profiler needs File I/O to write its results.
#define USE_FILEIO 1
#ifndef USE_PROFILER	/* { */
#define USE_PROFILER
#endif	/* } */
#endif	/* } */

#ifdef USE_PROFILER1	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define PROFFLAG prfflg1_561y.doj
#else
#define PROFFLAG prfflg1_561.doj
#endif	/* } */
#define USE_FILEIO 1
#ifndef USE_PROFILER	/* { */
#define USE_PROFILER
#endif	/* } */
#endif	/* } */

#ifdef USE_PROFILER2	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define PROFFLAG prfflg2_561y.doj
#else
#define PROFFLAG prfflg2_561.doj
#endif	/* } */
#define USE_FILEIO 1
#ifndef USE_PROFILER	/* { */
#define USE_PROFILER
#endif	/* } */
#endif	/* } */

#ifdef __WORKAROUNDS_ENABLED	/* { */
#define OMEGA idle561y.doj
#else
#define OMEGA idle561.doj
#endif	/* } */

#define MEMINIT __initsbsz561.doj,
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define LIBSMALL libsmall561y.dlb,
#else
#define LIBSMALL libsmall561.dlb,
#endif	/* } */

#ifdef M3_RESERVED	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define LIBM3 libm3res561y.dlb
#define LIBDSP libdspm3res561y.dlb
#define SFTFLT libsftflt561y.dlb
#else
#define LIBM3 libm3res561.dlb
#define LIBDSP libdspm3res561.dlb
#define SFTFLT libsftflt561.dlb
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define LIBM3 libm3free561y.dlb
#define LIBDSP libdsp561y.dlb
#define SFTFLT libsftflt561y.dlb
#else
#define LIBM3 libm3free561.dlb
#define LIBDSP libdsp561.dlb
#define SFTFLT libsftflt561.dlb
#endif	/* } */
#endif	/* } */

#ifdef IEEEFP	/* { */
#define FPLIBS SFTFLT, LIBDSP
#else
#define FPLIBS LIBDSP, SFTFLT
#endif	/* } */


#ifdef __WORKAROUNDS_ENABLED	/* { */
#ifdef __ADI_LIBEH__
#define LIBS LIBSMALL MEMINIT libc561y.dlb, LIBM3, libevent561y.dlb, libx561y.dlb, ibio561y.dlb, libcpp561yx.dlb, libcpprt561yx.dlb, FPLIBS, libetsi561.dlb, OMEGA
#else
#define LIBS LIBSMALL MEMINIT libc561y.dlb, LIBM3, libevent561y.dlb, libx561y.dlb, libio561y.dlb, libcpp561y.dlb, libcpprt561y.dlb, FPLIBS, libetsi561.dlb, OMEGA
#endif
#else
#ifdef __ADI_LIBEH__
#define LIBS LIBSMALL MEMINIT libc561.dlb, LIBM3, libevent561.dlb, libx561.dlb, libio561.dlb, libcpp561x.dlb, libcpprt561x.dlb, FPLIBS, libetsi561.dlb, OMEGA
#else
#define LIBS LIBSMALL MEMINIT libc561.dlb, LIBM3, libevent561.dlb, libx561.dlb, libio561.dlb, libcpp561.dlb, libcpprt561.dlb, FPLIBS, libetsi561.dlb, OMEGA
#endif
#endif	/* } */
#if defined(USE_FILEIO) || defined(USE_PROFGUIDE)
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define RTLIB librt_fileio561y.dlb
#else
#define RTLIB librt_fileio561.dlb
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define RTLIB librt561y.dlb
#else
#define RTLIB librt561.dlb
#endif	/* } */
#endif	/* } */
$LIBRARIES_CORE_A = corea.dlb, LIBS, RTLIB;
$LIBRARIES_CORE_B = coreb.dlb, LIBS, RTLIB;
$LIBRARIES_SML2 = sml2.dlb, LIBS, RTLIB;
$LIBRARIES_SML3 = sml3.dlb, LIBS, RTLIB;

// Libraries from the command line are included in COMMAND_LINE_OBJECTS.

#ifdef USE_PROFILER	/* { */
#ifdef USE_FILEIO	/* { */
#ifdef __cplusplus	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT crtsfpc561y.doj, libprofile561y.dlb, PROFFLAG
#else
#define CRT crtsfpc561.doj, libprofile561.dlb, PROFFLAG
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT crtsfp561y.doj, libprofile561y.dlb, PROFFLAG
#else
#define CRT crtsfp561.doj, libprofile561.dlb, PROFFLAG
#endif	/* } */
#endif  /* __cplusplus */	/* } */
#else
#ifdef __cplusplus	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT crtscp561y.doj, libprofile561y.dlb, PROFFLAG
#else
#define CRT crtscp561.doj, libprofile561.dlb, PROFFLAG
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT crtsp561y.doj, libprofile561y.dlb, PROFFLAG
#else
#define CRT crtsp561.doj, libprofile561.dlb, PROFFLAG
#endif	/* } */
#endif  /* __cplusplus */	/* } */
#endif  /* USE_FILEIO */	/* } */
#else
#ifdef USE_FILEIO	/* { */
#ifdef __cplusplus	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT  crtsfc561y.doj
#else
#define CRT  crtsfc561.doj
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT  crtsf561y.doj
#else
#define CRT  crtsf561.doj
#endif	/* } */
#endif /* __cplusplus */	/* } */
#else
#ifdef __cplusplus	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT  crtsc561y.doj
#else
#define CRT  crtsc561.doj
#endif	/* } */
#else
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define CRT	crts561y.doj
#else
#define CRT	crts561.doj
#endif	/* } */
#endif /* __cplusplus */	/* } */
#endif  /* USE_FILEIO */	/* } */
#endif  /* USE_PROFILER */	/* } */

#ifdef __cplusplus	/* { */
#ifdef __WORKAROUNDS_ENABLED	/* { */
#define ENDCRT , crtn561y.doj
#else
#define ENDCRT , crtn561.doj
#endif	/* } */
#else
#define ENDCRT
#endif	/* } */
$OBJECTS_CORE_A = CRT, $COMMAND_LINE_OBJECTS ,cplbtab561a.doj ENDCRT;
$OBJECTS_CORE_B = CRT, $COMMAND_LINE_OBJECTS ,cplbtab561b.doj ENDCRT;
$OBJECTS = $COMMAND_LINE_OBJECTS;


ELIMINATE(VERBOSE)



MEMORY
	/* L2 SRAM - 128K. */{
MEM_L2_SRAM_VOLDATA     {
	TYPE(RAM) WIDTH(8)
	START(0xFEB1F000) END(0xFEB1FFEF)
}
/* Shared area for file I/O Control variable */
/*        - FEB1FFF0 - FEB1FFFF */
MEM_SHARED_TESTSET   {
     TYPE(RAM) WIDTH(8)
     START(0xFEB1FFF0) END(0xFEB1FFFF)
}
MEM_L2_SRAM     {
	TYPE(RAM) WIDTH(8)
	START(0xFEB13000) END(0xFEB1EFFF)
}
MEM_L2_SRAM_BSZ     {	
	TYPE(RAM) WIDTH(8)
	START(0xFEB00000) END(0xFEB12FFF)
}
MEM_ASYNC3     {	/* Async Bank 3 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20300000) END(0x203FFFFF)
}
MEM_ASYNC2     {	/* Async Bank 2 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20200000) END(0x202FFFFF)
}
MEM_ASYNC1     {	/* Async Bank 1 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20100000) END(0x201FFFFF)
}
MEM_ASYNC0     {	/* Async Bank 0 - 1MB */
	TYPE(RAM) WIDTH(8)
	START(0x20000000) END(0x200FFFFF)
}

/* Claim some of SDRAM Bank 0 for heap */
/* since it needs a separate section */
	/* SDRAM Bank 0 - 16MB-128M */
MEM_SDRAM0     {
	TYPE(RAM) WIDTH(8)
	START(0x0000C400) END(0x07FFFFFF)
}
MEM_SDRAM0_VOLDATA     {
	TYPE(RAM) WIDTH(8)
	START(0x0000C000) END(0x0000C3FF)
}
MEM_SDRAM0_BSZ_INIT     {
	TYPE(RAM) WIDTH(8)
	START(0x00008000) END(0x0000BFFF)
}
MEM_SDRAM0_BSZ     {
	TYPE(RAM) WIDTH(8)
	START(0x00004000) END(0x00007FFF)
}
MEM_SDRAM0_HEAP     {	/* Claim some for ext heap - 16K */
	TYPE(RAM) WIDTH(8)
	START(0x00000004) END(0x00003FFF)
}
}
SHARED_MEMORY
{
	OUTPUT($COMMAND_LINE_OUTPUT_DIRECTORY/sml2.sm)
 	
	RESOLVE(_sFrame0,0x0000C400)
	RESOLVE(_sFrame1,0x01000000)
	RESOLVE(_sFrame2,0x02000000)
	RESOLVE(_sFrame3,0x03000000)

	SECTIONS {
        l2_sram
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(l2_sram) $LIBRARIES_SML2(l2_sram))
            INPUT_SECTIONS( $LIBRARIES_SML2(program))
            INPUT_SECTIONS( $LIBRARIES_SML2(data1))
            INPUT_SECTIONS( $LIBRARIES_SML2(constdata))
        } >MEM_L2_SRAM

        l2_sram_voldata
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS(voldata) $LIBRARIES_SML2(voldata))
        } >MEM_L2_SRAM_VOLDATA

        l2_bsz ZERO_INIT
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $LIBRARIES_SML2(bsz))
        } >MEM_L2_SRAM_BSZ

        primio_atomic_lock
        {
            // Holds control variable used to ensure atomic file I/O
            // Must be in shared memory and NOT cached.
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $LIBRARIES_SML2(primio_atomic_lock))
        } >MEM_SHARED_TESTSET

        sdram0
        {
            INPUT_SECTION_ALIGN(4)