vendor_name = ModelSim
source_file = 1, D:/newwork/i2c_p/soc/i2c.vhd
source_file = 1, D:/newwork/i2c_p/soc/i2c_control.vhd
source_file = 1, D:/newwork/i2c_p/soc/shift.vhd
source_file = 1, D:/newwork/i2c_p/soc/uc_interface.vhd
source_file = 1, D:/newwork/i2c_p/soc/upcnt4.vhd
source_file = 1, e:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf
source_file = 1, e:/altera/quartus42/libraries/megafunctions/lpm_constant.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/lpm_decode.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/lpm_add_sub.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/cmpconst.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/lpm_compare.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/lpm_counter.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/dffeea.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/alt_synch_counter.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/alt_synch_counter_f.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/alt_counter_stratix.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/aglobal42.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/cbx.lst
source_file = 1, e:/altera/quartus42/libraries/megafunctions/alt_synch_counter.tdf
source_file = 1, e:/altera/quartus42/libraries/megafunctions/mercury_lcell.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/apex20ke_lcell.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/apex20k_lcell.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/flex6k_lcell.inc
source_file = 1, e:/altera/quartus42/libraries/megafunctions/alt_asynch_counter.inc
design_name = i2c
instance = comp, \uC_CTRL|mif_bit_reset~I , uC_CTRL|mif_bit_reset, i2c, 1
instance = comp, \addr_bus[12]~I , addr_bus[12], i2c, 1
instance = comp, \uC_CTRL|mal_bit_reset~I , uC_CTRL|mal_bit_reset, i2c, 1
instance = comp, \uC_CTRL|mif_bit_reset~3_I , uC_CTRL|mif_bit_reset~3, i2c, 1
instance = comp, \addr_bus[7]~I , addr_bus[7], i2c, 1
instance = comp, \addr_bus[1]~I , addr_bus[1], i2c, 1
instance = comp, \uC_CTRL|data_out~2485_I , uC_CTRL|data_out~2485, i2c, 1
instance = comp, \uC_CTRL|data_out~2508_I , uC_CTRL|data_out~2508, i2c, 1
instance = comp, \I2C_CTRL|mbdr_i2c[1]~reg0_I , I2C_CTRL|mbdr_i2c[1]~reg0, i2c, 1
instance = comp, \I2C_CTRL|rxak~I , I2C_CTRL|rxak, i2c, 1
instance = comp, \I2C_CTRL|gen_stop~4_I , I2C_CTRL|gen_stop~4, i2c, 1
instance = comp, \I2C_CTRL|reduce_nor~149_I , I2C_CTRL|reduce_nor~149, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.scl_idle~83_I , I2C_CTRL|next_scl_state.scl_idle~83, i2c, 1
instance = comp, \uC_CTRL|data_en~58_I , uC_CTRL|data_en~58, i2c, 1
instance = comp, \addr_bus[17]~I , addr_bus[17], i2c, 1
instance = comp, \addr_bus[13]~I , addr_bus[13], i2c, 1
instance = comp, \addr_bus[20]~I , addr_bus[20], i2c, 1
instance = comp, \addr_bus[21]~I , addr_bus[21], i2c, 1
instance = comp, \I2C_CTRL|i2cdata_reg_ctrl~90_I , I2C_CTRL|i2cdata_reg_ctrl~90, i2c, 1
instance = comp, \I2C_CTRL|master_sda~I , I2C_CTRL|master_sda, i2c, 1
instance = comp, \I2C_CTRL|master_sda~90_I , I2C_CTRL|master_sda~90, i2c, 1
instance = comp, \sda~I , sda, i2c, 1
instance = comp, \scl~I , scl, i2c, 1
instance = comp, \data_bus[7]~I , data_bus[7], i2c, 1
instance = comp, \data_bus[6]~I , data_bus[6], i2c, 1
instance = comp, \data_bus[5]~I , data_bus[5], i2c, 1
instance = comp, \data_bus[4]~I , data_bus[4], i2c, 1
instance = comp, \data_bus[3]~I , data_bus[3], i2c, 1
instance = comp, \data_bus[2]~I , data_bus[2], i2c, 1
instance = comp, \data_bus[1]~I , data_bus[1], i2c, 1
instance = comp, \data_bus[0]~I , data_bus[0], i2c, 1
instance = comp, \as~I , as, i2c, 1
instance = comp, \clk~I , clk, i2c, 1
instance = comp, \reset~I , reset, i2c, 1
instance = comp, \uC_CTRL|as_int~I , uC_CTRL|as_int, i2c, 1
instance = comp, \uC_CTRL|as_int_d1~I , uC_CTRL|as_int_d1, i2c, 1
instance = comp, \ds~I , ds, i2c, 1
instance = comp, \uC_CTRL|ds_int~I , uC_CTRL|ds_int, i2c, 1
instance = comp, \uC_CTRL|prs_state.assert_dtack~I , uC_CTRL|prs_state.assert_dtack, i2c, 1
instance = comp, \uC_CTRL|dtack_int~I , uC_CTRL|dtack_int, i2c, 1
instance = comp, \addr_bus[19]~I , addr_bus[19], i2c, 1
instance = comp, \addr_bus[15]~I , addr_bus[15], i2c, 1
instance = comp, \addr_bus[8]~I , addr_bus[8], i2c, 1
instance = comp, \addr_bus[16]~I , addr_bus[16], i2c, 1
instance = comp, \addr_bus[23]~I , addr_bus[23], i2c, 1
instance = comp, \addr_bus[22]~I , addr_bus[22], i2c, 1
instance = comp, \addr_bus[11]~I , addr_bus[11], i2c, 1
instance = comp, \uC_CTRL|SYNCH_INPUTS~163_I , uC_CTRL|SYNCH_INPUTS~163, i2c, 1
instance = comp, \uC_CTRL|SYNCH_INPUTS~166_I , uC_CTRL|SYNCH_INPUTS~166, i2c, 1
instance = comp, \addr_bus[18]~I , addr_bus[18], i2c, 1
instance = comp, \addr_bus[14]~I , addr_bus[14], i2c, 1
instance = comp, \addr_bus[10]~I , addr_bus[10], i2c, 1
instance = comp, \addr_bus[9]~I , addr_bus[9], i2c, 1
instance = comp, \uC_CTRL|SYNCH_INPUTS~161_I , uC_CTRL|SYNCH_INPUTS~161, i2c, 1
instance = comp, \uC_CTRL|SYNCH_INPUTS~165_I , uC_CTRL|SYNCH_INPUTS~165, i2c, 1
instance = comp, \uC_CTRL|address_match~I , uC_CTRL|address_match, i2c, 1
instance = comp, \uC_CTRL|next_state.idle~86_I , uC_CTRL|next_state.idle~86, i2c, 1
instance = comp, \uC_CTRL|next_state.idle~85_I , uC_CTRL|next_state.idle~85, i2c, 1
instance = comp, \uC_CTRL|prs_state.idle~I , uC_CTRL|prs_state.idle, i2c, 1
instance = comp, \uC_CTRL|next_state.addr~13_I , uC_CTRL|next_state.addr~13, i2c, 1
instance = comp, \uC_CTRL|prs_state.addr~I , uC_CTRL|prs_state.addr, i2c, 1
instance = comp, \uC_CTRL|dtack_oe~0_I , uC_CTRL|dtack_oe~0, i2c, 1
instance = comp, \uC_CTRL|prs_state.data_trs~I , uC_CTRL|prs_state.data_trs, i2c, 1
instance = comp, \r_w~I , r_w, i2c, 1
instance = comp, \addr_bus[3]~I , addr_bus[3], i2c, 1
instance = comp, \addr_bus[4]~I , addr_bus[4], i2c, 1
instance = comp, \uC_CTRL|data_en~57_I , uC_CTRL|data_en~57, i2c, 1
instance = comp, \addr_bus[2]~I , addr_bus[2], i2c, 1
instance = comp, \addr_bus[0]~I , addr_bus[0], i2c, 1
instance = comp, \addr_bus[5]~I , addr_bus[5], i2c, 1
instance = comp, \addr_bus[6]~I , addr_bus[6], i2c, 1
instance = comp, \uC_CTRL|data_en~55_I , uC_CTRL|data_en~55, i2c, 1
instance = comp, \uC_CTRL|data_en~56_I , uC_CTRL|data_en~56, i2c, 1
instance = comp, \uC_CTRL|cntrl_en~I , uC_CTRL|cntrl_en, i2c, 1
instance = comp, \uC_CTRL|men~48_I , uC_CTRL|men~48, i2c, 1
instance = comp, \uC_CTRL|mien~reg0_I , uC_CTRL|mien~reg0, i2c, 1
instance = comp, \uC_CTRL|men~reg0_I , uC_CTRL|men~reg0, i2c, 1
instance = comp, \I2C_CTRL|sda_in~I , I2C_CTRL|sda_in, i2c, 1
instance = comp, \I2C_CTRL|stop_det~0_I , I2C_CTRL|stop_det~0, i2c, 1
instance = comp, \I2C_CTRL|detect_stop~I , I2C_CTRL|detect_stop, i2c, 1
instance = comp, \I2C_CTRL|state_machine~0_I , I2C_CTRL|state_machine~0, i2c, 1
instance = comp, \I2C_CTRL|state.wait_ack~I , I2C_CTRL|state.wait_ack, i2c, 1
instance = comp, \I2C_CTRL|state.ack_data~I , I2C_CTRL|state.ack_data, i2c, 1
instance = comp, \I2C_CTRL|scl_generator_comb~49_I , I2C_CTRL|scl_generator_comb~49, i2c, 1
instance = comp, \I2C_CTRL|sda_oe~25_I , I2C_CTRL|sda_oe~25, i2c, 1
instance = comp, \I2C_CTRL|Select~719_I , I2C_CTRL|Select~719, i2c, 1
instance = comp, \I2C_CTRL|sm_stop~I , I2C_CTRL|sm_stop, i2c, 1
instance = comp, \I2C_CTRL|msta_d1~I , I2C_CTRL|msta_d1, i2c, 1
instance = comp, \I2C_CTRL|gen_stop~I , I2C_CTRL|gen_stop, i2c, 1
instance = comp, \I2C_CTRL|mal~141_I , I2C_CTRL|mal~141, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.scl_idle~84_I , I2C_CTRL|next_scl_state.scl_idle~84, i2c, 1
instance = comp, \I2C_CTRL|scl_in~I , I2C_CTRL|scl_in, i2c, 1
instance = comp, \I2C_CTRL|scl_state.scl_high_edge~I , I2C_CTRL|scl_state.scl_high_edge, i2c, 1
instance = comp, \I2C_CTRL|stop_scl~12_I , I2C_CTRL|stop_scl~12, i2c, 1
instance = comp, \I2C_CTRL|scl_state.scl_low~I , I2C_CTRL|scl_state.scl_low, i2c, 1
instance = comp, \I2C_CTRL|stop_scl~77_I , I2C_CTRL|stop_scl~77, i2c, 1
instance = comp, \I2C_CTRL|stop_scl_reg~I , I2C_CTRL|stop_scl_reg, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.scl_high~96_I , I2C_CTRL|next_scl_state.scl_high~96, i2c, 1
instance = comp, \I2C_CTRL|clk_cnt_rst~62_I , I2C_CTRL|clk_cnt_rst~62, i2c, 1
instance = comp, \I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[0] , I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[0], i2c, 1
instance = comp, \I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[1] , I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[1], i2c, 1
instance = comp, \I2C_CTRL|reduce_nor~147_I , I2C_CTRL|reduce_nor~147, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.scl_high~12_I , I2C_CTRL|next_scl_state.scl_high~12, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.scl_high~97_I , I2C_CTRL|next_scl_state.scl_high~97, i2c, 1
instance = comp, \I2C_CTRL|scl_state.scl_high~I , I2C_CTRL|scl_state.scl_high, i2c, 1
instance = comp, \I2C_CTRL|scl_state.scl_low_edge~I , I2C_CTRL|scl_state.scl_low_edge, i2c, 1
instance = comp, \I2C_CTRL|reduce_or~21_I , I2C_CTRL|reduce_or~21, i2c, 1
instance = comp, \I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[2] , I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[2], i2c, 1
instance = comp, \I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[3] , I2C_CTRL|CLKCNT|q_int_rtl_1|wysi_counter|counter_cell[3], i2c, 1
instance = comp, \I2C_CTRL|reduce_nor~148_I , I2C_CTRL|reduce_nor~148, i2c, 1
instance = comp, \I2C_CTRL|gen_start~I , I2C_CTRL|gen_start, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.start~78_I , I2C_CTRL|next_scl_state.start~78, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.start~79_I , I2C_CTRL|next_scl_state.start~79, i2c, 1
instance = comp, \I2C_CTRL|scl_state.start~I , I2C_CTRL|scl_state.start, i2c, 1
instance = comp, \uC_CTRL|mbcr_wr~36_I , uC_CTRL|mbcr_wr~36, i2c, 1
instance = comp, \uC_CTRL|rsta~reg0_I , uC_CTRL|rsta~reg0, i2c, 1
instance = comp, \I2C_CTRL|sda_out~357_I , I2C_CTRL|sda_out~357, i2c, 1
instance = comp, \I2C_CTRL|sda_out~358_I , I2C_CTRL|sda_out~358, i2c, 1
instance = comp, \I2C_CTRL|sda_out~360_I , I2C_CTRL|sda_out~360, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.scl_idle~85_I , I2C_CTRL|next_scl_state.scl_idle~85, i2c, 1
instance = comp, \I2C_CTRL|next_scl_state.stop_wait~12_I , I2C_CTRL|next_scl_state.stop_wait~12, i2c, 1
instance = comp, \I2C_CTRL|scl_state.stop_wait~I , I2C_CTRL|scl_state.stop_wait, i2c, 1
instance = comp, \I2C_CTRL|sda_out~351_I , I2C_CTRL|sda_out~351, i2c, 1
instance = comp, \I2C_CTRL|sda_out~352_I , I2C_CTRL|sda_out~352, i2c, 1
instance = comp, \I2C_CTRL|sda_out_reg~I , I2C_CTRL|sda_out_reg, i2c, 1
instance = comp, \I2C_CTRL|sda_out_reg_d1~I , I2C_CTRL|sda_out_reg_d1, i2c, 1
instance = comp, \I2C_CTRL|Select~715_I , I2C_CTRL|Select~715, i2c, 1
instance = comp, \I2C_CTRL|Select~714_I , I2C_CTRL|Select~714, i2c, 1
instance = comp, \I2C_CTRL|Select~716_I , I2C_CTRL|Select~716, i2c, 1
instance = comp, \I2C_CTRL|i2c_header_en~I , I2C_CTRL|i2c_header_en, i2c, 1
instance = comp, \I2C_CTRL|I2CHEADER_REG|data_int[0]~I , I2C_CTRL|I2CHEADER_REG|data_int[0], i2c, 1