?? small.fit.qmsg
字號:
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|sld_rom_sr:crc_rom_sr\|clear_signal " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|sld_rom_sr:crc_rom_sr\|clear_signal " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} } { { "sld_rom_sr.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_rom_sr.vhd" 36 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_rom_sr:crc_rom_sr\|clear_signal" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|clear_signal } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|clear_signal } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" { } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 1014 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~5" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~5 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~411 " "Info: Destination node sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~411" { } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 1014 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~411" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~411 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~411 } "NODE_NAME" } } } 0} } { } 0} } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 1014 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29 " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 415 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~29 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~29 } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena " "Info: Automatically promoted node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~388 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~388" { } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~388" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~388 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~388 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~389 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~389" { } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~389" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~389 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~389 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~390 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~390" { } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~390" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~390 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~390 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~391 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~391" { } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~391" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~391 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~391 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~12 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~12" { } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 547 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|lpm_shiftreg:ram_data_shift_out\|_~12" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~12 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~12 } "NODE_NAME" } } } 0} } { } 0} } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 400 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|offload_shift_ena" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] " "Info: Automatically promoted node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~110 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~110" { } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1128 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~110" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~110 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~110 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~112 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~112" { } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1017 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|post_trigger_count_enable~112" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~112 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable~112 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\] " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" { } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1128 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out\[2\]" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_hub:sld_hub_inst\|IRSR_D\[2\]~469 " "Info: Destination node sld_hub:sld_hub_inst\|IRSR_D\[2\]~469" { } { { "sld_hub.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_hub.vhd" 334 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|IRSR_D\[2\]~469" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_hub:sld_hub_inst|IRSR_D[2]~469 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_hub:sld_hub_inst|IRSR_D[2]~469 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~70 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~70" { } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_state_machine:sm1\|edq~70" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~70 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq~70 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~85 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~85" { } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1399 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|segment_write_addr_adv_ena~85" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~85 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|segment_write_addr_adv_ena~85 } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29 " "Info: Destination node sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29" { } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 415 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_signaltap:auto_signaltap_0\|sld_offload_buffer_mgr:\\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst\|acq_buf_read_reset~29" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~29 } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~29 } "NODE_NAME" } } } 0} } { } 0} } { { "sld_dffex.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\]" } } } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" "" { Report "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small_cmp.qrpt" Compiler "small" "UNKNOWN" "V1" "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/db/small.quartus_db" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } "" } } { "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" { Floorplan "D:/GX_SOPC_Dev_Lab/EP2C35/EDA/BASE/lab7/small.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" { } { } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" { } { } 0}
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