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?? fsk.mdl

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  }
  BlockParameterDefaults {
    Block {
      BlockType		      Constant
    }
    Block {
      BlockType		      DiscretePulseGenerator
      PulseType		      "Sample based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Period		      "2"
      PulseWidth	      "1"
      PhaseDelay	      "0"
      SampleTime	      "1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      Inport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchByCopyingInsideSignal off
      Interpolate	      on
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Arial"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "FSK"
    Location		    [95, 82, 1014, 721]
    Open		    on
    ModelBrowserVisibility  on
    ModelBrowserWidth	    93
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "Aword"
      Description	      "Sign Binary Fractionnal"
      Ports		      [1, 1]
      Position		      [450, 322, 515, 338]
      ForegroundColor	      "blue"
      SourceBlock	      "allblocks_alteradspbuilder/Input"
      SourceType	      "AltBus AlteraBlockSet"
      sgn		      "Signed Integer"
      nodetype		      "Input Port"
      bwl		      "10"
      bwr		      "0"
      sat		      off
      rnd		      off
      bp		      off
      mask_cst		      "0"
      LocPin		      "any"
      cst		      "0"
      modulename	      "Aword"
      ppat		      "D:\\my_eda3\\ASK_FSK\\DSPBuilder_FSK"
      nSgCpl		      "1"
      SIGNALCOMPILER_PARAMS   "sgn;Signed Integer;nodetype;Input Port;bwl;10;b"
"wr;0;sat;off;rnd;off;cst;0;LocPin;any;"
    }
    Block {
      BlockType		      Constant
      Name		      "Constant"
      Position		      [360, 250, 410, 270]
      Value		      "0"
      VectorParams1D	      on
      SamplingMode	      "Sample based"
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "sfix(16)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "2^0"
      SampleTime	      "inf"
      FramePeriod	      "inf"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant1"
      Description	      "Sign Binary Fractionnal"
      Ports		      [0, 1]
      Position		      [170, 335, 235, 355]
      ForegroundColor	      "blue"
      SourceBlock	      "allblocks_alteradspbuilder/Constant"
      SourceType	      "AltBus AlteraBlockSet"
      sgn		      "Signed Integer"
      nodetype		      "Constant"
      bwl		      "32"
      bwr		      "0"
      sat		      off
      rnd		      off
      bp		      off
      mask_cst		      "80000000"
      ncstsamp		      "1"
      cst		      "80000000"
      modulename	      "Constant"
      nSgCpl		      "0"
      SIGNALCOMPILER_PARAMS   "sgn;Signed Integer;nodetype;Constant;bwl;32;bwr"
";0;sat;off;rnd;off;cst;80000000;"
    }
    Block {
      BlockType		      Reference
      Name		      "Constant2"
      Description	      "Sign Binary Fractionnal"
      Ports		      [0, 1]
      Position		      [170, 284, 235, 306]
      ForegroundColor	      "blue"
      SourceBlock	      "allblocks_alteradspbuilder/Constant"
      SourceType	      "AltBus AlteraBlockSet"
      sgn		      "Signed Integer"
      nodetype		      "Constant"
      bwl		      "32"
      bwr		      "0"
      sat		      off
      rnd		      off
      bp		      off
      mask_cst		      "15000000"
      ncstsamp		      "1"
      cst		      "15000000"
      modulename	      "Constant"
      nSgCpl		      "0"
      SIGNALCOMPILER_PARAMS   "sgn;Signed Integer;nodetype;Constant;bwl;32;bwr"
";0;sat;off;rnd;off;cst;15000000;"
    }
    Block {
      BlockType		      Constant
      Name		      "Constant4"
      Position		      [360, 320, 410, 340]
      Value		      "100"
      VectorParams1D	      on
      SamplingMode	      "Sample based"
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "sfix(16)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "2^0"
      SampleTime	      "inf"
      FramePeriod	      "inf"
    }
    Block {
      BlockType		      DiscretePulseGenerator
      Name		      "Pulse\nGenerator"
      Ports		      [0, 1]
      Position		      [80, 228, 125, 262]
      PulseType		      "Time based"
      Period		      "1000"
      PulseWidth	      "50"
    }
    Block {
      BlockType		      Reference
      Name		      "Pword"
      Description	      "Sign Binary Fractionnal"
      Ports		      [1, 1]
      Position		      [445, 252, 510, 268]
      ForegroundColor	      "blue"
      SourceBlock	      "allblocks_alteradspbuilder/Input"
      SourceType	      "AltBus AlteraBlockSet"
      sgn		      "Signed Integer"
      nodetype		      "Input Port"
      bwl		      "8"
      bwr		      "0"
      sat		      off
      rnd		      off
      bp		      off
      mask_cst		      "0"
      LocPin		      "any"
      cst		      "0"
      modulename	      "Pword"
      ppat		      "D:\\my_eda3\\ASK_FSK\\DSPBuilder_FSK"
      nSgCpl		      "1"
      SIGNALCOMPILER_PARAMS   "sgn;Signed Integer;nodetype;Input Port;bwl;8;bw"
"r;0;sat;off;rnd;off;cst;0;LocPin;any;"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope"
      Ports		      [2]
      Position		      [775, 286, 805, 319]
      Floating		      off
      Location		      [87, 235, 877, 561]
      Open		      off
      NumInputPorts	      "2"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
	axes2			"%<SignalLabel>"
      }
      YMin		      "-80~-2"
      YMax		      "80~2"
      DataFormat	      "StructureWithTime"
      SampleTime	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "SignalCompiler"
      Ports		      []
      Position		      [659, 188, 728, 235]
      ForegroundColor	      "blue"
      SourceBlock	      "allblocks_alteradspbuilder/SignalCompiler"
      SourceType	      "SignalCompiler"
      family		      "Stratix"
      opt		      "Balanced"
      synthtool		      "Others"
      vstim		      on
      SynthAct		      "None"
      workdir		      "D:\\my_eda3\\ASK_FSK"
      Procetype		      "prod"
      UseReset		      on
      ResetPin		      "Active High"
      ClockPin		      "Output to Pin"
      ClockPeriod	      "20"
      UseSignalTap	      off
      CreatePtfFile	      off
      SignalTapDepth	      "128"
      VerilogSupport	      off
      UniqueVHDLHierarchyName off
      RegenerateIPFunctionalModel off
      RunUpdatedSimulation    off
      JTAGCable		      "USB-Blaster [USB-0]"
      dspb_ver		      "6.1"
    }
    Block {
      BlockType		      Reference
      Name		      "data_in"
      Description	      "Sign Binary Fractionnal"
      Ports		      [1, 1]
      Position		      [185, 237, 240, 253]
      ForegroundColor	      "blue"
      SourceBlock	      "allblocks_alteradspbuilder/Input"
      SourceType	      "AltBus AlteraBlockSet"
      sgn		      "Single Bit"
      nodetype		      "Input Port"
      bwl		      "10"
      bwr		      "0"
      sat		      off
      rnd		      off
      bp		      off
      mask_cst		      "0"
      LocPin		      "any"
      cst		      "0"
      modulename	      "data_in"
      ppat		      "D:\\my_eda3\\ASK_FSK\\DSPBuilder_FSK"
      nSgCpl		      "1"
      SIGNALCOMPILER_PARAMS   "sgn;Single Bit;nodetype;Input Port;bwl;1;bwr;0;"
"sat;off;rnd;off;cst;0;LocPin;any;"
    }
    Block {
      BlockType		      Reference
      Name		      "data_out"
      Description	      "Sign Binary Fractionnal"
      Ports		      [1, 1]
      Position		      [670, 287, 735, 303]
      ForegroundColor	      "blue"
      SourceBlock	      "allblocks_alteradspbuilder/Output"
      SourceType	      "AltBus AlteraBlockSet"
      sgn		      "Signed Integer"
      nodetype		      "Output Port"
      bwl		      "10"
      bwr		      "0"
      sat		      off
      rnd		      off
      bp		      off
      mask_cst		      "0"
      LocPin		      "any"
      cst		      "0"
      modulename	      "Output"
      nSgCpl		      "0"
      SIGNALCOMPILER_PARAMS   "sgn;Signed Integer;nodetype;Output Port;bwl;10;"
"bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
    }
    Block {
      BlockType		      SubSystem
      Name		      "dds"
      Ports		      [3, 1]
      Position		      [545, 239, 635, 351]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      MaskType		      "SubSystem AlteraBlockSet"
      MaskIconFrame	      on
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskIconUnits	      "autoscale"
      System {
	Name			"dds"
	Location		[144, 83, 996, 722]
	Open			off
	ModelBrowserVisibility	on
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "P[7:0]"
	  Position		  [130, 63, 160, 77]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "F[31:0]"
	  Position		  [125, 208, 155, 222]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "A[9:0]"
	  Position		  [135, 408, 165, 422]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "AltBus"
	  Description		  "Sign Binary Fractionnal"
	  Ports			  [1, 1]
	  Position		  [485, 187, 550, 203]
	  ForegroundColor	  "blue"
	  SourceBlock		  "allblocks_alteradspbuilder/AltBus"
	  SourceType		  "AltBus AlteraBlockSet"
	  sgn			  "Signed Integer"
	  nodetype		  "Internal Node"
	  bwl			  "32"
	  bwr			  "0"
	  sat			  off
	  rnd			  off
	  bp			  off
	  mask_cst		  "0"
	  LocPin		  "any"
	  cst			  "0"
	  modulename		  "AltBus"
	  ppat			  "d:\\dspbuilder\\Altlib\\DSPBuilder_allblock"
"s_alteradspbuilder"
	  nSgCpl		  "0"
	  SIGNALCOMPILER_PARAMS	  "sgn;Signed Integer;nodetype;Internal Node;b"
"wl;32;bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Aword"
	  Description		  "Sign Binary Fractionnal"
	  Ports			  [1, 1]
	  Position		  [215, 407, 280, 423]
	  ForegroundColor	  "blue"
	  SourceBlock		  "allblocks_alteradspbuilder/Input"
	  SourceType		  "AltBus AlteraBlockSet"
	  sgn			  "Signed Integer"
	  nodetype		  "Input Port"
	  bwl			  "10"
	  bwr			  "0"
	  sat			  off
	  rnd			  off
	  bp			  off
	  mask_cst		  "0"
	  LocPin		  "any"
	  cst			  "0"
	  modulename		  "Aword"
	  ppat			  "d:\\dspbuilder\\Altlib\\DSPBuilder_allblock"
"s_alteradspbuilder"
	  nSgCpl		  "0"
	  SIGNALCOMPILER_PARAMS	  "sgn;Signed Integer;nodetype;Input Port;bwl;"
"10;bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
	}
	Block {
	  BlockType		  Reference
	  Name			  "BusConcatenation"
	  Ports			  [2, 1]
	  Position		  [355, 61, 460, 99]
	  ForegroundColor	  "blue"

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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