m255cModel TechnologydD:\DATA\Project\Stratix_ZBT_project\zbt_rd_vhdl_str_v1.0.0\sim_lib\timingEaddr_ctrl_outDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1061773646dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalF../../lib/addr_ctrl_out.vhdl0L35V?ZCXF^QK]>4i<>W>jVf8i3OV;C;5.6a;15o-work work -O0tExplicit TArtlDE work addr_ctrl_out ?ZCXF^QK]>4i<>W>jVf8i3l68L61V5If]1`2P80h8;_Zi^IKC_1OV;C;5.6a;15M1 ieee std_logic_1164o-work work -O0tExplicit TEalt3pramDP work altera_common_conversion ;OM;QF7=PO9heHnHoPFjN1DP work altera_device_families egiA7B_mUm_2lBL>9o00]1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L14706V:4ZKN:=gknRgN0^?3PYcG0OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DE work alt3pram :4ZKN:=gknRgN0^?3PYcG0l14813L14755VD<0LIPLF;mIC]C4P4fAnA3OV;C;5.6a;1531M6 ieee std_logic_1164M5 ieee std_logic_arithM4 std textioM3 work altera_device_familiesM2 work altera_common_conversionM1 ieee std_logic_unsignedo-93 -work work -O0tExplicit TEalt_exc_dpramDP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L19934VSO::hf=KhLPHCgbc>TJ3M2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviourDE work alt_exc_dpram SO::hf=KhLPHCgbc>TJ3M2l20121L19964ViiJngj]TkmU=Fk04J5Z<H2OV;C;5.6a;1531M5 ieee std_logic_1164M4 ieee std_logic_unsignedM3 ieee std_logic_arithM2 ieee std_logic_textioM1 std textioo-93 -work work -O0tExplicit TEalt_exc_upcoreDP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L20332V72AlNm`4heI2<zMeV]VI]2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviourDE work alt_exc_upcore 72AlNm`4heI2<zMeV]VI]2l21123L20449Vjk2LR<bNWL<XW_hEN;gc72OV;C;5.6a;1531M5 ieee std_logic_1164M4 ieee std_logic_arithM3 ieee std_logic_textioM2 std textioM1 ieee std_logic_unsignedo-93 -work work -O0tExplicit TEaltaccumulateDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L375V3PU51HRKSaifG5f4:CaEX2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviourDE work altaccumulate 3PU51HRKSaifG5f4:CaEX2l423L408VMT1NKmUIfM>C;^6GgJ?E:3OV;C;5.6a;1531M2 ieee std_logic_1164M1 ieee std_logic_aritho-93 -work work -O0tExplicit TEaltcamDP work altera_common_conversion ;OM;QF7=PO9heHnHoPFjN1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L12243VZib9GBR1Pm1`TS=Q5m3N>0OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaveDP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DE work altcam Zib9GBR1Pm1`TS=Q5m3N>0l12486L12435VLj]fVHbbBK`DCS=90g1nm2OV;C;5.6a;1531M5 ieee std_logic_1164M4 ieee std_logic_arithM3 std textioM2 work altera_common_conversionM1 ieee std_logic_unsignedo-93 -work work -O0tExplicit TEaltcdr_rxDP work pllpack K=B]aPZk98D_<REJj:B`R3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L9799VXXzSi@Z=4Q7Ml]i]zTOQU3OV;C;5.6a;1531o-93 -work work -O0tExplicit TAstructDE work hssi_fifo B7b[XK7l>`H3Qan79o4d=3DE work hssi_rx a15>TBb6l76`OhTZ@lh`Y3DE work hssi_pll ;[N_mfTB=?Yf;;8jmmJ1^0DE work altcdr_rx XXzSi@Z=4Q7Ml]i]zTOQU3l9897L9830VJ1:I26:d5P5=B5=@o;_9N0OV;C;5.6a;1531M2 ieee std_logic_1164M1 work pllpacko-93 -work work -O0tExplicit TEaltcdr_txDP work pllpack K=B]aPZk98D_<REJj:B`R3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L10017Vz9I3bliI5P2_043h8>8>C3OV;C;5.6a;1531o-93 -work work -O0tExplicit TAstructDE work hssi_tx d]XZAKAA`jOcUOj9dIEeo2DE work hssi_fifo B7b[XK7l>`H3Qan79o4d=3DE work hssi_pll ;[N_mfTB=?Yf;;8jmmJ1^0DE work altcdr_tx z9I3bliI5P2_043h8>8>C3l10103L10044VXMjCILc>hOl7`58g^9i6m1OV;C;5.6a;1531M2 ieee std_logic_1164M1 work pllpacko-93 -work work -O0tExplicit TEaltclklockDP work altera_device_families egiA7B_mUm_2lBL>9o00]1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L3297VP=[Ucn5nk5TAZG;0925Tz2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDE work altclklock P=[Ucn5nk5TAZG;0925Tz2l3418L3408VmzjWG6m9T2Gj@fTKIXB;?2OV;C;5.6a;1531M2 ieee std_logic_1164M1 work altera_device_familieso-93 -work work -O0tExplicit TEaltddio_bidirDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L4273VH`0oh4bCKckcoi>?UE1?T2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAstructDP work altera_device_families egiA7B_mUm_2lBL>9o00]1DE work altddio_out VnlgH0MRm3EYJWZQbB]QX3DE work altddio_in chaB^_E3i_oW=GFZil]8F0DE work altddio_bidir H`0oh4bCKckcoi>?UE1?T2l4357L4318V78Njl65AcH9830B0HJWe>1OV;C;5.6a;1531M2 ieee std_logic_1164M1 work altera_device_familieso-93 -work work -O0tExplicit TEaltddio_inDP work altera_device_families egiA7B_mUm_2lBL>9o00]1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L3997VchaB^_E3i_oW=GFZil]8F0OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaveDE work altddio_in chaB^_E3i_oW=GFZil]8F0l4022L4021V^lOJ[D7[UcKc_n2XM3LKf2OV;C;5.6a;1531M2 ieee std_logic_1164M1 work altera_device_familieso-93 -work work -O0tExplicit TEaltddio_outDP work altera_device_families egiA7B_mUm_2lBL>9o00]1DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L4125VVnlgH0MRm3EYJWZQbB]QX3OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaveDE work altddio_out VnlgH0MRm3EYJWZQbB]QX3l4162L4153V`^BIgiXL3^W<jo_:G[3V?1OV;C;5.6a;1531M2 ieee std_logic_1164M1 work altera_device_familieso-93 -work work -O0tExplicit TEaltdpramDP work altera_common_conversion ;OM;QF7=PO9heHnHoPFjN1DP work altera_device_families egiA7B_mUm_2lBL>9o00]1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L14227VE_W3^E?J1F1SIXf7>f<Kn2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DE work altdpram E_W3^E?J1F1SIXf7>f<Kn2l14293L14266VCElfVNY@O;[HmOE2HAL0E2OV;C;5.6a;1531M6 ieee std_logic_1164M5 ieee std_logic_arithM4 std textioM3 work altera_device_familiesM2 work altera_common_conversionM1 ieee std_logic_unsignedo-93 -work work -O0tExplicit TPaltera_common_conversionDP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L213V;OM;QF7=PO9heHnHoPFjN1OV;C;5.6a;1531b1M2 ieee std_logic_1164M1 std textioo-93 -work work -O0tExplicit TBbodyDB work altera_common_conversion ;OM;QF7=PO9heHnHoPFjN1l0L213V;OM;QF7=PO9heHnHoPFjN1OV;C;5.6a;1531M2 ieee std_logic_1164M1 std textioo-93 -work work -O0tExplicit TnbodyPaltera_device_familiesDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L88VegiA7B_mUm_2lBL>9o00]1OV;C;5.6a;1531b1M1 ieee std_logic_1164o-93 -work work -O0tExplicit TBbodyDB work altera_device_families egiA7B_mUm_2lBL>9o00]1l0L88VegiA7B_mUm_2lBL>9o00]1OV;C;5.6a;1531M1 ieee std_logic_1164o-93 -work work -O0tExplicit TnbodyEaltfp_multDP std textio K]Z^fghZ6B=BjnK5NomDT3DP work altera_common_conversion ;OM;QF7=PO9heHnHoPFjN1DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L2491VF=KQ`XFddoQO6jUohYmc73OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDE work altfp_mult F=KQ`XFddoQO6jUohYmc73l2636L2540VB4TTZ?Z7F28Y2bzT5Ho?01OV;C;5.6a;1531M4 ieee std_logic_1164M3 ieee std_logic_arithM2 work altera_common_conversionM1 std textioo-93 -work work -O0tExplicit TEaltlvds_rxDP work altera_device_families egiA7B_mUm_2lBL>9o00]1DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L10217VbEkS6di6ge@W]CIhX5=Ae2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDE work altpll UdfFcOg_Nc8KGAdj5diNA3DE work altclklock P=[Ucn5nk5TAZG;0925Tz2DE work altlvds_rx bEkS6di6ge@W]CIhX5=Ae2l10546L10274V;S4A0GiU3Dm[ied]=fHE^3OV;C;5.6a;1531M3 ieee std_logic_1164M2 ieee std_logic_arithM1 work altera_device_familieso-93 -work work -O0tExplicit TEaltlvds_txDP work altera_device_families egiA7B_mUm_2lBL>9o00]1DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L11378Vba_`zHKH1Kg6OZh[9]fJ@2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDE work altpll UdfFcOg_Nc8KGAdj5diNA3DE work altclklock P=[Ucn5nk5TAZG;0925Tz2DE work altlvds_tx ba_`zHKH1Kg6OZh[9]fJ@2l11841L11487Vg^[?k;`30N3Y_0YSQGA=[1OV;C;5.6a;1531M3 ieee std_logic_1164M2 ieee std_logic_arithM1 work altera_device_familieso-93 -work work -O0tExplicit TEaltmult_accumDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L601VJ4n:gNaUd;8CXXY1cf;W@3OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviourDE work altmult_accum J4n:gNaUd;8CXXY1cf;W@3l723L683VRPH?21SL=0jB[Vlnei<6Y3OV;C;5.6a;1531M2 ieee std_logic_1164M1 ieee std_logic_aritho-93 -work work -O0tExplicit TEaltmult_addDP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L1267V=^`2TdEHJS9Az9AD<>g1[2OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviourDE work altmult_add =^`2TdEHJS9Az9AD<>g1[2l1513L1402VP^o;IfEl:ZjmQoW_[Nl>W2OV;C;5.6a;1531M2 ieee std_logic_1164M1 ieee std_logic_aritho-93 -work work -O0tExplicit TEaltpllDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L7893VUdfFcOg_Nc8KGAdj5diNA3OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDP work pllpack K=B]aPZk98D_<REJj:B`R3DE work stratix_pll [99L2jT4MfcnIW@Z;9g4`2DE work altpll UdfFcOg_Nc8KGAdj5diNA3l8360L8091VZ1J>ZzD_48<cNRH1lKRz>3OV;C;5.6a;1531M2 ieee std_logic_1164M1 work pllpacko-93 -work work -O0tExplicit TEaltqpramDP work altera_common_conversion ;OM;QF7=PO9heHnHoPFjN1DP std textio K]Z^fghZ6B=BjnK5NomDT3DP ieee std_logic_arith XinSYO>L7_n;;dMn;72:52DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L15329Vh9PIG^G2D6a`QFoLoSIQJ0OV;C;5.6a;1531o-93 -work work -O0tExplicit TAbehaviorDP ieee std_logic_unsigned hEMVMlaNCR^<OOoVNV;m90DE work altqpram h9PIG^G2D6a`QFoLoSIQJ0l15484L15416VPJ[=ziR4kP2^485<U3@2V3OV;C;5.6a;1531M5 ieee std_logic_1164M4 ieee std_logic_arithM3 std textioM2 work altera_common_conversionM1 ieee std_logic_unsignedo-93 -work work -O0tExplicit TEaltshift_tapsDP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2w1059582128dD:\zbt_rd_vhdl_str_v1.0.1\sim_lib\functionalFC:/quartus2_3.0_220/eda/sim_lib/altera_mf.vhdl0L19855