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?? picoblaze_amp_adc_control.ucf

?? Xilinx FPGA 開發板的ADC采樣源程序 內有PDF文檔詳細說明 VHDL代碼
?? UCF
字號:
# Constraints for 'picoblaze_amp_adc_control'.
#
# Revision C of the Spartan-3E Starter Kit.
#
# Ken Chapman - Xilinx Ltd - December 2005
# Revised 23rd February 2006
#
# Period constraint for 50MHz operation
#
NET "clk" PERIOD = 20.0ns HIGH 50%;
#
# I/O constraints for Spartan-3E Starter Kit (Rev.B)
#
#
# soldered 50MHz Clock
# 
NET "clk" LOC = "C9" | IOSTANDARD = LVTTL;
#
#
# Simple LEDs 
# Require only 3.5mA. 
#
NET "led<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<6>" LOC = "E9"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
NET "led<7>" LOC = "F9"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;
#
#
# SPI devices 
#
NET "spi_sck"      LOC = "U16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "spi_sdi"      LOC = "T4"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "spi_sdo"      LOC = "N10" | IOSTANDARD = LVCMOS33;
NET "spi_rom_cs"   LOC = "U3"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "spi_amp_cs"   LOC = "N7"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "spi_adc_conv" LOC = "P11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "spi_dac_cs"   LOC = "N8"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "spi_amp_shdn" LOC = "P7"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
NET "spi_amp_sdo"  LOC = "E18" | IOSTANDARD = LVCMOS33;
NET "spi_dac_clr"  LOC = "P8"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8;
#
#
# Strata Flash (need to disable to use SDO signal of the SPI bus and LCD display) 
#
NET "strataflash_oe" LOC = "C18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "strataflash_ce" LOC = "D16" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "strataflash_we" LOC = "D17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
#
#
# Platform Flash (need to disable to use SDO signal of the SPI bus) 
#
NET "platformflash_oe" LOC = "T3" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
#
#
# LCD display
# Very slow so can use lowest drive strength. 
#
NET "lcd_rs"   LOC = "L18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "lcd_rw"   LOC = "L17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "lcd_e"    LOC = "M18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "lcd_d<4>" LOC = "R15" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "lcd_d<5>" LOC = "R16" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "lcd_d<6>" LOC = "P17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
NET "lcd_d<7>" LOC = "M15" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
#
#
# Simple I/O ports on J4 
#
NET "simple_io<9>"  LOC = "D7" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "simple_io<10>" LOC = "C7" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "simple_io<11>" LOC = "F8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
NET "simple_io<12>" LOC = "E8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
#
#
# Simple switches 
#   Pull UP resistors used to stop floating condition during switching. 
#
NET "switch<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP;
NET "switch<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP;
NET "switch<2>" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP;
NET "switch<3>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP;
#
#
# Press buttons 
#   Must have pull DOWN resistors to provide Low when not pressed.
#
NET "btn_north" LOC = "V4"  | IOSTANDARD = LVTTL | PULLDOWN;
NET "btn_east"  LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN;
NET "btn_south" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN;
NET "btn_west"  LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN;
#
#
# End of File
#





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