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?? hmb_max.fit.eqn

?? ALTERA Nios II Embedded Evaluation Kit開發板制造商(terasic)提供的多媒體顯示板(Terasic Multimedia Touch Panel Daugh
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-- Copyright (C) 1991-2006 Altera Corporation

-- Your use of Altera Corporation's design tools, logic functions 

-- and other software and tools, and its AMPP partner logic 

-- functions, and any output files any of the foregoing 

-- (including device programming or simulation files), and any 

-- associated documentation or information are expressly subject 

-- to the terms and conditions of the Altera Program License 

-- Subscription Agreement, Altera MegaCore Function License 

-- Agreement, or other applicable license agreement, including, 

-- without limitation, that your use is for the sole purpose of 

-- programming logic devices manufactured by Altera and sold by 

-- Altera or its authorized distributors.  Please refer to the 

-- applicable agreement for further details.

--B1_CLK is vga_mode3_decode:u1|CLK at LC_X10_Y6_N2

--operation mode is normal



B1_CLK_lut_out = B1_v_clr & (!B1_MODE_33[1] # !B1_MODE_33[0]) # !B1_v_clr & (B1_CLK);

B1_CLK = DFFEAS(B1_CLK_lut_out, !GLOBAL(HC_VGA_CLOCK), VCC, , , , , , );





--B1L58 is vga_mode3_decode:u1|VGA_R[0]~110 at LC_X16_Y4_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[0]_qfbk = B1_VGA_R_o[0];

B1L58 = HC_VGA_BLANK & (B1_VGA_R_o[0]_qfbk);



--B1_VGA_R_o[0] is vga_mode3_decode:u1|VGA_R_o[0] at LC_X16_Y4_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[0] = DFFEAS(B1L58, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[0], , , VCC);





--B1L59 is vga_mode3_decode:u1|VGA_R[1]~111 at LC_X15_Y4_N9

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[1]_qfbk = B1_VGA_R_o[1];

B1L59 = HC_VGA_BLANK & B1_VGA_R_o[1]_qfbk;



--B1_VGA_R_o[1] is vga_mode3_decode:u1|VGA_R_o[1] at LC_X15_Y4_N9

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[1] = DFFEAS(B1L59, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[1], , , VCC);





--B1L60 is vga_mode3_decode:u1|VGA_R[2]~112 at LC_X17_Y4_N3

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[2]_qfbk = B1_VGA_R_o[2];

B1L60 = HC_VGA_BLANK & B1_VGA_R_o[2]_qfbk;



--B1_VGA_R_o[2] is vga_mode3_decode:u1|VGA_R_o[2] at LC_X17_Y4_N3

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[2] = DFFEAS(B1L60, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[2], , , VCC);





--B1L61 is vga_mode3_decode:u1|VGA_R[3]~113 at LC_X16_Y4_N8

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[3]_qfbk = B1_VGA_R_o[3];

B1L61 = HC_VGA_BLANK & B1_VGA_R_o[3]_qfbk;



--B1_VGA_R_o[3] is vga_mode3_decode:u1|VGA_R_o[3] at LC_X16_Y4_N8

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[3] = DFFEAS(B1L61, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[3], , , VCC);





--B1L62 is vga_mode3_decode:u1|VGA_R[4]~114 at LC_X15_Y4_N7

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[4]_qfbk = B1_VGA_R_o[4];

B1L62 = HC_VGA_BLANK & (B1_VGA_R_o[4]_qfbk);



--B1_VGA_R_o[4] is vga_mode3_decode:u1|VGA_R_o[4] at LC_X15_Y4_N7

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[4] = DFFEAS(B1L62, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[4], , , VCC);





--B1L63 is vga_mode3_decode:u1|VGA_R[5]~115 at LC_X17_Y4_N1

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[5]_qfbk = B1_VGA_R_o[5];

B1L63 = HC_VGA_BLANK & B1_VGA_R_o[5]_qfbk;



--B1_VGA_R_o[5] is vga_mode3_decode:u1|VGA_R_o[5] at LC_X17_Y4_N1

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[5] = DFFEAS(B1L63, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[5], , , VCC);





--B1L64 is vga_mode3_decode:u1|VGA_R[6]~116 at LC_X17_Y4_N9

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[6]_qfbk = B1_VGA_R_o[6];

B1L64 = HC_VGA_BLANK & B1_VGA_R_o[6]_qfbk;



--B1_VGA_R_o[6] is vga_mode3_decode:u1|VGA_R_o[6] at LC_X17_Y4_N9

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[6] = DFFEAS(B1L64, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[6], , , VCC);





--B1L65 is vga_mode3_decode:u1|VGA_R[7]~117 at LC_X17_Y4_N7

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[7]_qfbk = B1_VGA_R_o[7];

B1L65 = HC_VGA_BLANK & B1_VGA_R_o[7]_qfbk;



--B1_VGA_R_o[7] is vga_mode3_decode:u1|VGA_R_o[7] at LC_X17_Y4_N7

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[7] = DFFEAS(B1L65, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[7], , , VCC);





--B1L66 is vga_mode3_decode:u1|VGA_R[8]~118 at LC_X17_Y4_N8

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[8]_qfbk = B1_VGA_R_o[8];

B1L66 = HC_VGA_BLANK & B1_VGA_R_o[8]_qfbk;



--B1_VGA_R_o[8] is vga_mode3_decode:u1|VGA_R_o[8] at LC_X17_Y4_N8

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[8] = DFFEAS(B1L66, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[8], , , VCC);





--B1L67 is vga_mode3_decode:u1|VGA_R[9]~119 at LC_X17_Y4_N4

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[9]_qfbk = B1_VGA_R_o[9];

B1L67 = HC_VGA_BLANK & B1_VGA_R_o[9]_qfbk;



--B1_VGA_R_o[9] is vga_mode3_decode:u1|VGA_R_o[9] at LC_X17_Y4_N4

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_R_o[9] = DFFEAS(B1L67, GLOBAL(HC_VGA_CLOCK), VCC, , B1L2, HC_VGA_DATA[9], , , VCC);





--B1L37 is vga_mode3_decode:u1|VGA_G[0]~110 at LC_X15_Y4_N3

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[0]_qfbk = B1_VGA_G_o[0];

B1L37 = HC_VGA_BLANK & (B1_VGA_G_o[0]_qfbk);



--B1_VGA_G_o[0] is vga_mode3_decode:u1|VGA_G_o[0] at LC_X15_Y4_N3

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[0] = DFFEAS(B1L37, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[0], , , VCC);





--B1L38 is vga_mode3_decode:u1|VGA_G[1]~111 at LC_X15_Y4_N2

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[1]_qfbk = B1_VGA_G_o[1];

B1L38 = HC_VGA_BLANK & (B1_VGA_G_o[1]_qfbk);



--B1_VGA_G_o[1] is vga_mode3_decode:u1|VGA_G_o[1] at LC_X15_Y4_N2

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[1] = DFFEAS(B1L38, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[1], , , VCC);





--B1L39 is vga_mode3_decode:u1|VGA_G[2]~112 at LC_X14_Y4_N8

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[2]_qfbk = B1_VGA_G_o[2];

B1L39 = HC_VGA_BLANK & (B1_VGA_G_o[2]_qfbk);



--B1_VGA_G_o[2] is vga_mode3_decode:u1|VGA_G_o[2] at LC_X14_Y4_N8

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[2] = DFFEAS(B1L39, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[2], , , VCC);





--B1L40 is vga_mode3_decode:u1|VGA_G[3]~113 at LC_X14_Y4_N9

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[3]_qfbk = B1_VGA_G_o[3];

B1L40 = HC_VGA_BLANK & (B1_VGA_G_o[3]_qfbk);



--B1_VGA_G_o[3] is vga_mode3_decode:u1|VGA_G_o[3] at LC_X14_Y4_N9

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[3] = DFFEAS(B1L40, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[3], , , VCC);





--B1L41 is vga_mode3_decode:u1|VGA_G[4]~114 at LC_X15_Y4_N1

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[4]_qfbk = B1_VGA_G_o[4];

B1L41 = HC_VGA_BLANK & (B1_VGA_G_o[4]_qfbk);



--B1_VGA_G_o[4] is vga_mode3_decode:u1|VGA_G_o[4] at LC_X15_Y4_N1

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[4] = DFFEAS(B1L41, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[4], , , VCC);





--B1L42 is vga_mode3_decode:u1|VGA_G[5]~115 at LC_X17_Y4_N5

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[5]_qfbk = B1_VGA_G_o[5];

B1L42 = HC_VGA_BLANK & (B1_VGA_G_o[5]_qfbk);



--B1_VGA_G_o[5] is vga_mode3_decode:u1|VGA_G_o[5] at LC_X17_Y4_N5

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[5] = DFFEAS(B1L42, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[5], , , VCC);





--B1L43 is vga_mode3_decode:u1|VGA_G[6]~116 at LC_X17_Y4_N2

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[6]_qfbk = B1_VGA_G_o[6];

B1L43 = HC_VGA_BLANK & B1_VGA_G_o[6]_qfbk;



--B1_VGA_G_o[6] is vga_mode3_decode:u1|VGA_G_o[6] at LC_X17_Y4_N2

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[6] = DFFEAS(B1L43, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[6], , , VCC);





--B1L44 is vga_mode3_decode:u1|VGA_G[7]~117 at LC_X14_Y4_N4

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[7]_qfbk = B1_VGA_G_o[7];

B1L44 = HC_VGA_BLANK & B1_VGA_G_o[7]_qfbk;



--B1_VGA_G_o[7] is vga_mode3_decode:u1|VGA_G_o[7] at LC_X14_Y4_N4

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[7] = DFFEAS(B1L44, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[7], , , VCC);





--B1L45 is vga_mode3_decode:u1|VGA_G[8]~118 at LC_X17_Y4_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[8]_qfbk = B1_VGA_G_o[8];

B1L45 = HC_VGA_BLANK & (B1_VGA_G_o[8]_qfbk);



--B1_VGA_G_o[8] is vga_mode3_decode:u1|VGA_G_o[8] at LC_X17_Y4_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[8] = DFFEAS(B1L45, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[8], , , VCC);





--B1L46 is vga_mode3_decode:u1|VGA_G[9]~119 at LC_X17_Y4_N0

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[9]_qfbk = B1_VGA_G_o[9];

B1L46 = HC_VGA_BLANK & (B1_VGA_G_o[9]_qfbk);



--B1_VGA_G_o[9] is vga_mode3_decode:u1|VGA_G_o[9] at LC_X17_Y4_N0

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_G_o[9] = DFFEAS(B1L46, GLOBAL(HC_VGA_CLOCK), VCC, , B1L3, HC_VGA_DATA[9], , , VCC);





--B1L16 is vga_mode3_decode:u1|VGA_B[0]~110 at LC_X14_Y4_N7

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_B_o[0]_qfbk = B1_VGA_B_o[0];

B1L16 = HC_VGA_BLANK & B1_VGA_B_o[0]_qfbk;



--B1_VGA_B_o[0] is vga_mode3_decode:u1|VGA_B_o[0] at LC_X14_Y4_N7

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_B_o[0] = DFFEAS(B1L16, GLOBAL(HC_VGA_CLOCK), VCC, , B1L4, HC_VGA_DATA[0], , , VCC);





--B1L17 is vga_mode3_decode:u1|VGA_B[1]~111 at LC_X14_Y4_N3

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_B_o[1]_qfbk = B1_VGA_B_o[1];

B1L17 = HC_VGA_BLANK & (B1_VGA_B_o[1]_qfbk);



--B1_VGA_B_o[1] is vga_mode3_decode:u1|VGA_B_o[1] at LC_X14_Y4_N3

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_B_o[1] = DFFEAS(B1L17, GLOBAL(HC_VGA_CLOCK), VCC, , B1L4, HC_VGA_DATA[1], , , VCC);





--B1L18 is vga_mode3_decode:u1|VGA_B[2]~112 at LC_X14_Y4_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_B_o[2]_qfbk = B1_VGA_B_o[2];

B1L18 = HC_VGA_BLANK & (B1_VGA_B_o[2]_qfbk);



--B1_VGA_B_o[2] is vga_mode3_decode:u1|VGA_B_o[2] at LC_X14_Y4_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



B1_VGA_B_o[2] = DFFEAS(B1L18, GLOBAL(HC_VGA_CLOCK), VCC, , B1L4, HC_VGA_DATA[2], , , VCC);



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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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