?? hmb_max.fit.eqn

?? ALTERA Nios II Embedded Evaluation Kit開發板制造商(terasic)提供的多媒體顯示板（Terasic Multimedia Touch Panel Daugh
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--operation mode is arithmetic



B1L80_cout_0 = B1_v_cnt[0];

B1L80 = CARRY(B1L80_cout_0);



--B1L81 is vga_mode3_decode:u1|add~166COUT1_212 at LC_X16_Y3_N0

--operation mode is arithmetic



B1L81_cout_1 = B1_v_cnt[0];

B1L81 = CARRY(B1L81_cout_1);





--B1L82 is vga_mode3_decode:u1|add~169 at LC_X16_Y3_N1

--operation mode is arithmetic



B1L82 = B1_v_cnt[1] $ B1L80;



--B1L83 is vga_mode3_decode:u1|add~171 at LC_X16_Y3_N1

--operation mode is arithmetic



B1L83_cout_0 = !B1L80 # !B1_v_cnt[1];

B1L83 = CARRY(B1L83_cout_0);



--B1L84 is vga_mode3_decode:u1|add~171COUT1_214 at LC_X16_Y3_N1

--operation mode is arithmetic



B1L84_cout_1 = !B1L81 # !B1_v_cnt[1];

B1L84 = CARRY(B1L84_cout_1);





--B1L85 is vga_mode3_decode:u1|add~174 at LC_X16_Y3_N2

--operation mode is arithmetic



B1L85 = B1_v_cnt[2] $ !B1L83;



--B1L86 is vga_mode3_decode:u1|add~176 at LC_X16_Y3_N2

--operation mode is arithmetic



B1L86_cout_0 = B1_v_cnt[2] & !B1L83;

B1L86 = CARRY(B1L86_cout_0);



--B1L87 is vga_mode3_decode:u1|add~176COUT1_216 at LC_X16_Y3_N2

--operation mode is arithmetic



B1L87_cout_1 = B1_v_cnt[2] & !B1L84;

B1L87 = CARRY(B1L87_cout_1);





--B1L88 is vga_mode3_decode:u1|add~179 at LC_X16_Y3_N3

--operation mode is arithmetic



B1L88 = B1_v_cnt[3] $ B1L86;



--B1L89 is vga_mode3_decode:u1|add~181 at LC_X16_Y3_N3

--operation mode is arithmetic



B1L89_cout_0 = !B1L86 # !B1_v_cnt[3];

B1L89 = CARRY(B1L89_cout_0);



--B1L90 is vga_mode3_decode:u1|add~181COUT1_217 at LC_X16_Y3_N3

--operation mode is arithmetic



B1L90_cout_1 = !B1L87 # !B1_v_cnt[3];

B1L90 = CARRY(B1L90_cout_1);





--B1L5 is vga_mode3_decode:u1|Equal~186 at LC_X15_Y3_N0

--operation mode is normal



B1L5 = B1L79 & !B1L85 & !B1L88 & !B1L82;





--B1L91 is vga_mode3_decode:u1|add~184 at LC_X16_Y3_N4

--operation mode is arithmetic



B1L91 = B1_v_cnt[4] $ (!B1L89);



--B1L92 is vga_mode3_decode:u1|add~186 at LC_X16_Y3_N4

--operation mode is arithmetic



B1L92 = B1L93;





--B1L95 is vga_mode3_decode:u1|add~189 at LC_X16_Y3_N5

--operation mode is arithmetic



B1L95_carry_eqn = (!B1L92 & GND) # (B1L92 & VCC);

B1L95 = B1_v_cnt[5] $ (B1L95_carry_eqn);



--B1L96 is vga_mode3_decode:u1|add~191 at LC_X16_Y3_N5

--operation mode is arithmetic



B1L96_cout_0 = !B1L92 # !B1_v_cnt[5];

B1L96 = CARRY(B1L96_cout_0);



--B1L97 is vga_mode3_decode:u1|add~191COUT1_219 at LC_X16_Y3_N5

--operation mode is arithmetic



B1L97_cout_1 = !B1L92 # !B1_v_cnt[5];

B1L97 = CARRY(B1L97_cout_1);





--B1L6 is vga_mode3_decode:u1|Equal~187 at LC_X15_Y3_N4

--operation mode is normal



B1L6 = !B1L91 & (!B1L95);





--B1L98 is vga_mode3_decode:u1|add~194 at LC_X16_Y3_N6

--operation mode is arithmetic



B1L98_carry_eqn = (!B1L92 & B1L96) # (B1L92 & B1L97);

B1L98 = B1_v_cnt[6] $ !B1L98_carry_eqn;



--B1L99 is vga_mode3_decode:u1|add~196 at LC_X16_Y3_N6

--operation mode is arithmetic



B1L99_cout_0 = B1_v_cnt[6] & !B1L96;

B1L99 = CARRY(B1L99_cout_0);



--B1L100 is vga_mode3_decode:u1|add~196COUT1_221 at LC_X16_Y3_N6

--operation mode is arithmetic



B1L100_cout_1 = B1_v_cnt[6] & !B1L97;

B1L100 = CARRY(B1L100_cout_1);





--B1L101 is vga_mode3_decode:u1|add~199 at LC_X16_Y3_N7

--operation mode is normal



B1L101_carry_eqn = (!B1L92 & B1L99) # (B1L92 & B1L100);

B1L101 = B1L101_carry_eqn $ B1_v_cnt[7];





--B1L7 is vga_mode3_decode:u1|Equal~188 at LC_X15_Y3_N5

--operation mode is normal



B1L7 = !B1L101 & B1L5 & !B1L98 & B1L6;





--D1_oLCD_RGB_Delay2[0] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[0] at LC_X11_Y12_N0

--operation mode is normal



D1_oLCD_RGB_Delay2[0]_lut_out = D1_oLCD_RGB_Delay1[0];

D1_oLCD_RGB_Delay2[0] = DFFEAS(D1_oLCD_RGB_Delay2[0]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_LCD_VD_Delay[0] is LCD_DATA_DECODE:u3|LCD_VD_Delay[0] at LC_X12_Y11_N4

--operation mode is normal



D1_LCD_VD_Delay[0]_lut_out = HC_VD;

D1_LCD_VD_Delay[0] = DFFEAS(D1_LCD_VD_Delay[0]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_SIPO_cnt[1] is LCD_DATA_DECODE:u3|SIPO_cnt[1] at LC_X9_Y12_N3

--operation mode is normal



D1_SIPO_cnt[1]_lut_out = D1_SIPO_cnt[0] & !D1_SIPO_cnt[1];

D1_SIPO_cnt[1] = DFFEAS(D1_SIPO_cnt[1]_lut_out, GLOBAL(HC_NCLK), D1_LCD_VD_Delay[0], , , , , , );





--D1L1 is LCD_DATA_DECODE:u3|Equal~156 at LC_X9_Y12_N5

--operation mode is normal



D1_SIPO_cnt[0]_qfbk = D1_SIPO_cnt[0];

D1L1 = !D1_SIPO_cnt[0]_qfbk & !D1_SIPO_cnt[1];



--D1_SIPO_cnt[0] is LCD_DATA_DECODE:u3|SIPO_cnt[0] at LC_X9_Y12_N5

--operation mode is normal



D1_SIPO_cnt[0] = DFFEAS(D1L1, GLOBAL(HC_NCLK), D1_LCD_VD_Delay[0], , , , , , );





--D1_oLCD_RGB_Delay2[1] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[1] at LC_X8_Y12_N0

--operation mode is normal



D1_oLCD_RGB_Delay2[1]_lut_out = D1_oLCD_RGB_Delay1[1];

D1_oLCD_RGB_Delay2[1] = DFFEAS(D1_oLCD_RGB_Delay2[1]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay2[2] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[2] at LC_X8_Y12_N5

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay2[2]_lut_out = GND;

D1_oLCD_RGB_Delay2[2] = DFFEAS(D1_oLCD_RGB_Delay2[2]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay1[2], , , VCC);





--D1_oLCD_RGB_Delay2[3] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[3] at LC_X11_Y12_N3

--operation mode is normal



D1_oLCD_RGB_Delay2[3]_lut_out = D1_oLCD_RGB_Delay1[3];

D1_oLCD_RGB_Delay2[3] = DFFEAS(D1_oLCD_RGB_Delay2[3]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay2[4] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[4] at LC_X9_Y13_N2

--operation mode is normal



D1_oLCD_RGB_Delay2[4]_lut_out = D1_oLCD_RGB_Delay1[4];

D1_oLCD_RGB_Delay2[4] = DFFEAS(D1_oLCD_RGB_Delay2[4]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay2[5] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[5] at LC_X10_Y12_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay2[5]_lut_out = GND;

D1_oLCD_RGB_Delay2[5] = DFFEAS(D1_oLCD_RGB_Delay2[5]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay1[5], , , VCC);





--D1_oLCD_RGB_Delay2[6] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[6] at LC_X9_Y13_N0

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay2[6]_lut_out = GND;

D1_oLCD_RGB_Delay2[6] = DFFEAS(D1_oLCD_RGB_Delay2[6]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay1[6], , , VCC);





--D1_oLCD_RGB_Delay2[7] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay2[7] at LC_X11_Y12_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay2[7]_lut_out = GND;

D1_oLCD_RGB_Delay2[7] = DFFEAS(D1_oLCD_RGB_Delay2[7]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay1[7], , , VCC);





--D1_oLCD_RGB_Delay1[0] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[0] at LC_X11_Y12_N8

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay1[0]_lut_out = GND;

D1_oLCD_RGB_Delay1[0] = DFFEAS(D1_oLCD_RGB_Delay1[0]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay[0], , , VCC);





--D1_oLCD_RGB_Delay1[1] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[1] at LC_X8_Y12_N9

--operation mode is normal



D1_oLCD_RGB_Delay1[1]_lut_out = D1_oLCD_RGB_Delay[1];

D1_oLCD_RGB_Delay1[1] = DFFEAS(D1_oLCD_RGB_Delay1[1]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay1[2] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[2] at LC_X8_Y12_N7

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay1[2]_lut_out = GND;

D1_oLCD_RGB_Delay1[2] = DFFEAS(D1_oLCD_RGB_Delay1[2]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay[2], , , VCC);





--D1_oLCD_RGB_Delay1[3] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[3] at LC_X11_Y12_N2

--operation mode is normal



D1_oLCD_RGB_Delay1[3]_lut_out = D1_oLCD_RGB_Delay[3];

D1_oLCD_RGB_Delay1[3] = DFFEAS(D1_oLCD_RGB_Delay1[3]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay1[4] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[4] at LC_X9_Y13_N9

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay1[4]_lut_out = GND;

D1_oLCD_RGB_Delay1[4] = DFFEAS(D1_oLCD_RGB_Delay1[4]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay[4], , , VCC);





--D1_oLCD_RGB_Delay1[5] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[5] at LC_X10_Y12_N0

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay1[5]_lut_out = GND;

D1_oLCD_RGB_Delay1[5] = DFFEAS(D1_oLCD_RGB_Delay1[5]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay[5], , , VCC);





--D1_oLCD_RGB_Delay1[6] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[6] at LC_X9_Y13_N4

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay1[6]_lut_out = GND;

D1_oLCD_RGB_Delay1[6] = DFFEAS(D1_oLCD_RGB_Delay1[6]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay[6], , , VCC);





--D1_oLCD_RGB_Delay1[7] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay1[7] at LC_X11_Y12_N4

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay1[7]_lut_out = GND;

D1_oLCD_RGB_Delay1[7] = DFFEAS(D1_oLCD_RGB_Delay1[7]_lut_out, GLOBAL(HC_NCLK), VCC, , , D1_oLCD_RGB_Delay[7], , , VCC);





--D1_oLCD_RGB_Delay[0] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[0] at LC_X11_Y12_N5

--operation mode is normal



D1_oLCD_RGB_Delay[0]_lut_out = HC_LCD_DATA[0];

D1_oLCD_RGB_Delay[0] = DFFEAS(D1_oLCD_RGB_Delay[0]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay[1] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[1] at LC_X8_Y12_N1

--operation mode is normal



D1_oLCD_RGB_Delay[1]_lut_out = HC_LCD_DATA[1];

D1_oLCD_RGB_Delay[1] = DFFEAS(D1_oLCD_RGB_Delay[1]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay[2] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[2] at LC_X8_Y12_N6

--operation mode is normal

--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.



D1_oLCD_RGB_Delay[2]_lut_out = GND;

D1_oLCD_RGB_Delay[2] = DFFEAS(D1_oLCD_RGB_Delay[2]_lut_out, GLOBAL(HC_NCLK), VCC, , , HC_LCD_DATA[2], , , VCC);





--D1_oLCD_RGB_Delay[3] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[3] at LC_X11_Y12_N9

--operation mode is normal



D1_oLCD_RGB_Delay[3]_lut_out = HC_LCD_DATA[3];

D1_oLCD_RGB_Delay[3] = DFFEAS(D1_oLCD_RGB_Delay[3]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay[4] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[4] at LC_X9_Y13_N6

--operation mode is normal



D1_oLCD_RGB_Delay[4]_lut_out = HC_LCD_DATA[4];

D1_oLCD_RGB_Delay[4] = DFFEAS(D1_oLCD_RGB_Delay[4]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay[5] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[5] at LC_X14_Y12_N3

--operation mode is normal



D1_oLCD_RGB_Delay[5]_lut_out = HC_LCD_DATA[5];

D1_oLCD_RGB_Delay[5] = DFFEAS(D1_oLCD_RGB_Delay[5]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay[6] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[6] at LC_X9_Y13_N5

--operation mode is normal



D1_oLCD_RGB_Delay[6]_lut_out = HC_LCD_DATA[6];

D1_oLCD_RGB_Delay[6] = DFFEAS(D1_oLCD_RGB_Delay[6]_lut_out, GLOBAL(HC_NCLK), VCC, , , , , , );





--D1_oLCD_RGB_Delay[7] is LCD_DATA_DECODE:u3|oLCD_RGB_Delay[7] at LC_X11_Y12_N7

--operation mode is normal
?? 文件大小 26822 K
?? 上傳用戶 qqpp2q
?? 所屬分類 VHDL/FPGA/Verilog
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?? hmb_max.fit.eqn

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