?? regkeys
字號(hào):
NUM_PROPERTIES428sprop_100_namePROP_CPLDFitkeepiosprop_100_val"false"sprop_101_namePROP_cpldBestFitsprop_101_val"false"sprop_102_namePROP_xcpldFitDesMultiLogicOptsprop_102_val"true"sprop_103_namePROP_cpldfit_otherCmdLineOptionssprop_103_val""sprop_104_namePROP_fitGenSimModelsprop_104_val"false"sprop_105_namePROP_cpldfitHDLeqStylesprop_105_val"Source"sprop_106_namePROP_xcpldFitDesSlewsprop_106_val"Fast"sprop_107_namePROP_xcpldUseGlobalClockssprop_107_val"true"sprop_108_namePROP_xcpldUseGlobalOutputEnablessprop_108_val"true"sprop_109_namePROP_xcpldUseGlobalSetResetsprop_109_val"true"sprop_10_namePROP_UseSmartGuidesprop_10_val"false"sprop_110_namePROP_hprep6_autosigsprop_110_val"false"sprop_111_namePROP_hprep6_otherCmdLineOptionssprop_111_val""sprop_112_namePROP_xcpldFittimRptOptionsprop_112_val"Summary"sprop_113_namePROP_taengine_otherCmdLineOptionssprop_113_val""sprop_114_namePROP_xilxSynthMacroPreservesprop_114_val"true"sprop_115_namePROP_xilxSynthXORPreservesprop_115_val"true"sprop_116_namePROP_xilxSynthKeepHierarchy_CPLDsprop_116_val"Yes"sprop_117_namePROP_PlsClockEnablesprop_117_val"true"sprop_118_namePROP_CompxlibAbelLibsprop_118_val"true"sprop_119_namePROP_CompxlibCPLDDetLibsprop_119_val"true"sprop_11_namePROP_PartitionCreateDeletesprop_11_val""sprop_120_namePROP_UseDataGatesprop_120_val"true"sprop_121_namePROP_xcpldFitTemplate_xpla3sprop_121_val"Optimize Density"sprop_122_namePROP_FunctionBlockInputLimitsprop_122_val"38"sprop_123_namePROP_xcpldFitDesInputLmt_xbrsprop_123_val"32"sprop_124_namePROP_xcpldFitDesUnusedsprop_124_val"Keeper"sprop_125_namePROP_xcpldFitDesTriModesprop_125_val"Keeper"sprop_126_namePROP_xcpldFitDesVoltsprop_126_val"LVCMOS18"sprop_127_namePROP_xilxBitgCfg_GenOpt_IEEE1532File_xbrsprop_127_val"false"sprop_128_namePROP_mapIgnoreTimingConstraintssprop_128_val"false"sprop_129_namePROP_ngdbuildUseLOCConstraintssprop_129_val"true"sprop_12_namePROP_PartitionForceSynthsprop_12_val""sprop_130_namePROP_xilxNgdbldNTTypesprop_130_val"Timestamp"sprop_131_namePROP_xilxNgdbldIOPadssprop_131_val"false"sprop_132_namePROP_xilxNgdbldUnexpBlkssprop_132_val"false"sprop_133_namePROP_xilxNgdbldURsprop_133_val""sprop_134_namePROP_xilxMapTrimUnconnSigsprop_134_val"true"sprop_135_namePROP_xilxMapReplicateLogicsprop_135_val"true"sprop_136_namePROP_xilxMapAllowLogicOptsprop_136_val"false"sprop_137_namePROP_xilxMapCoverModesprop_137_val"Area"sprop_138_namePROP_xilxMapReportDetailsprop_138_val"false"sprop_139_namePROP_mapUseRLOCConstraintssprop_139_val"true"sprop_13_namePROP_PartitionForceTranslatesprop_13_val""sprop_140_namePROP_xilxMapPackRegIntosprop_140_val"Off"sprop_141_namePROP_xilxMapDisableRegOrderingsprop_141_val"false"sprop_142_namePROP_xilxMapSliceLogicInUnusedBRAMssprop_142_val"false"sprop_143_namePROP_map_otherCmdLineOptionssprop_143_val""sprop_144_namePROP_xilxPARplacerEffortLevelsprop_144_val"None"sprop_145_namePROP_xilxPARrouterEffortLevelsprop_145_val"None"sprop_146_namePROP_xilxPARplacerCostTablesprop_146_val"1"sprop_147_namePROP_xilxPARstratsprop_147_val"Normal Place and Route"sprop_148_namePROP_parUseTimingConstraintssprop_148_val"true"sprop_149_namePROP_parIgnoreTimingConstraintssprop_149_val"false"sprop_14_namePROP_PartitionForcePlacementsprop_14_val""sprop_150_namePROP_xilxPARuseBondedIOsprop_150_val"false"sprop_151_namePROP_par_otherCmdLineOptionssprop_151_val""sprop_152_namePROP_mpprRsltToCopysprop_152_val""sprop_153_namePROP_xilxBitgCfg_GenOpt_DRCsprop_153_val"true"sprop_154_namePROP_xilxBitgCfg_GenOpt_BitFilesprop_154_val"true"sprop_155_namePROP_xilxBitgCfg_GenOpt_BinaryFilesprop_155_val"false"sprop_156_namePROP_xilxBitgCfg_GenOpt_ASCIIFilesprop_156_val"false"sprop_157_namePROP_xilxBitgCfg_GenOpt_Compresssprop_157_val"false"sprop_158_namePROP_bitgen_otherCmdLineOptionssprop_158_val""sprop_159_namePROP_xilxBitgCfg_Clksprop_159_val"Pull Up"sprop_15_namePROP_DesignNamesprop_15_val"SR_Latch"sprop_160_namePROP_xilxBitgCfg_M0sprop_160_val"Pull Up"sprop_161_namePROP_xilxBitgCfg_M1sprop_161_val"Pull Up"sprop_162_namePROP_xilxBitgCfg_M2sprop_162_val"Pull Up"sprop_163_namePROP_xilxBitgCfg_Pgmsprop_163_val"Pull Up"sprop_164_namePROP_xilxBitgCfg_Donesprop_164_val"Pull Up"sprop_165_namePROP_xilxBitgCfg_TCKsprop_165_val"Pull Up"sprop_166_namePROP_xilxBitgCfg_TDIsprop_166_val"Pull Up"sprop_167_namePROP_xilxBitgCfg_TDOsprop_167_val"Pull Up"sprop_168_namePROP_xilxBitgCfg_TMSsprop_168_val"Pull Up"sprop_169_namePROP_xilxBitgCfg_Unusedsprop_169_val"Pull Down"sprop_16_namePROP_Dummysprop_16_val"dum1"sprop_170_namePROP_xilxBitgCfg_Codesprop_170_val"0xFFFFFFFF"sprop_171_namePROP_xilxBitgStart_Clksprop_171_val"CCLK"sprop_172_namePROP_xilxBitgStart_IntDonesprop_172_val"false"sprop_173_namePROP_xilxBitgStart_Clk_Donesprop_173_val"Default (4)"sprop_174_namePROP_xilxBitgStart_Clk_EnOutsprop_174_val"Default (5)"sprop_175_namePROP_xilxBitgStart_Clk_WrtEnsprop_175_val"Default (6)"sprop_176_namePROP_xilxBitgStart_Clk_RelDLLsprop_176_val"Default (NoWait)"sprop_177_namePROP_xilxBitgStart_Clk_DriveDonesprop_177_val"false"sprop_178_namePROP_xilxBitgReadBk_Secsprop_178_val"Enable Readback and Reconfiguration"sprop_179_namePROP_xilxBitgCfg_GenOpt_ReadBacksprop_179_val"false"sprop_17_namePROP_LastAppliedGoalsprop_17_val"Balanced"sprop_180_namePROP_CurrentFloorplanFilesprop_180_val""sprop_181_namePROP_xilxPreTrceRptsprop_181_val"Verbose Report"sprop_182_namePROP_xilxPreTrceRptLimitsprop_182_val"3"sprop_183_namePROP_xilxPreTrceAdvAnasprop_183_val"false"sprop_184_namePROP_xilxPreTrceUncovPathsprop_184_val""sprop_185_namePROP_xilxPreTrceEndpointPathsprop_185_val""sprop_186_namePROP_PreTrceFastPathsprop_186_val"false"sprop_187_namePROP_xilxPostTrceRptsprop_187_val"Verbose Report"sprop_188_namePROP_xilxPostTrceRptLimitsprop_188_val"3"sprop_189_namePROP_xilxPostTrceAdvAnasprop_189_val"false"sprop_18_namePROP_LastAppliedStrategysprop_18_val"Xilinx Default (unlocked)"sprop_190_namePROP_xilxPostTrceUncovPathsprop_190_val""sprop_191_namePROP_xilxPostTrceEndpointPathsprop_191_val""sprop_192_namePROP_PostTrceFastPathsprop_192_val"false"sprop_193_namePROP_xilxPostTrceStampsprop_193_val""sprop_194_namePROP_PreTrceGenTimegroupssprop_194_val"false"sprop_195_namePROP_PreTrceGenDatasheetsprop_195_val"true"sprop_196_namePROP_PostTrceGenTimegroupssprop_196_val"false"sprop_197_namePROP_PostTrceGenDatasheetsprop_197_val"true"sprop_198_namePROP_xilxPostTrceTSIFilesprop_198_val""sprop_199_namePROP_PreTrceTSIFilesprop_199_val""sprop_19_namePROP_LastUnlockStatussprop_19_val"false"sprop_1_namePROP_Parse_Targetsprop_1_val"synthesis"sprop_200_namePROP_primetimeBlockRamDatasprop_200_val""sprop_201_namePROP_primeFlatternOutputNetlistsprop_201_val"false"sprop_202_namePROP_primeCorrelateOutputsprop_202_val"false"sprop_203_namePROP_primeTopLevelModulesprop_203_val""sprop_204_namePROP_AutoGenFilesprop_204_val"false"sprop_205_namePROP_CompxlibXlnxCoreLibsprop_205_val"true"sprop_206_namePROP_xilxSynthGlobOptsprop_206_val"AllClockNets"sprop_207_namePROP_xstAutoBRAMPackingsprop_207_val"false"sprop_208_namePROP_xstBRAMUtilRatiosprop_208_val"100"sprop_209_namePROP_xstAsynToSyncsprop_209_val"false"sprop_20_namePROP_UserBrowsedStrategyFilessprop_20_val""sprop_210_namePROP_xstReadCoressprop_210_val"true"sprop_211_namePROP_xstCoresSearchDirsprop_211_val""sprop_212_namePROP_xstWriteTimingConstraintssprop_212_val"false"sprop_213_namePROP_xstSliceUtilRatiosprop_213_val"100"sprop_214_namePROP_xstCrossClockAnalysissprop_214_val"false"sprop_215_namePROP_xstFsmStylesprop_215_val"LUT"sprop_216_namePROP_SynthExtractRAMsprop_216_val"true"sprop_217_namePROP_SynthExtractROMsprop_217_val"true"sprop_218_namePROP_SynthDecoderExtractsprop_218_val"true"sprop_219_namePROP_SynthEncoderExtractsprop_219_val"Yes"sprop_21_namePROP_OverwriteSymsprop_21_val"false"sprop_220_namePROP_SynthShiftRegExtractsprop_220_val"true"sprop_221_namePROP_SynthLogicalShifterExtractsprop_221_val"true"sprop_222_namePROP_xilxSynthRegBalancingsprop_222_val"No"sprop_223_namePROP_xstPackIORegistersprop_223_val"Auto"sprop_224_namePROP_xstSlicePackingsprop_224_val"true"sprop_225_namePROP_xstOptimizeInsPrimtivessprop_225_val"false"sprop_226_namePROP_xilxSynthRegDuplicationsprop_226_val"true"sprop_227_namePROP_xstUseClockEnablesprop_227_val"Yes"sprop_228_namePROP_xstUseSyncSetsprop_228_val"Yes"sprop_229_namePROP_xstUseSyncResetsprop_229_val"Yes"sprop_22_namePROP_CompxlibOutputDirsprop_22_val"$XILINX/<language>/<simulator>"sprop_230_namePROP_xilxMapTimingDrivenPackingsprop_230_val"false"sprop_231_namePROP_xilxBitgCfg_GenOpt_IEEE1532Filesprop_231_val"false"sprop_232_namePROP_xilxBitgCfg_GenOpt_EnableCRCsprop_232_val"true"sprop_233_namePROP_xilxBitgCfg_DCMShutdownsprop_233_val"false"sprop_234_namePROP_xilxBitgStart_Clk_MatchCyclesprop_234_val"Auto"sprop_235_namePROPEXT_xilxMapGenInputK_virtex2sprop_235_val"4"sprop_236_namePROPEXT_SynthMultStyle_virtex2sprop_236_val"Auto"sprop_237_namePROPEXT_xilxSynthMaxFanout_virtex2sprop_237_val"500"sprop_238_namePROPEXT_xilxSynthAddBufg_spartan3sprop_238_val"8"sprop_239_namePROPEXT_xilxBitgCfg_Rate_spartan3sprop_239_val"Default (6)"sprop_23_namePROP_CompxlibOverwriteLibsprop_23_val"Overwrite"sprop_240_namePROPEXT_xilxBitgCfg_DCIUpdateMode_spartan3sprop_240_val"As Required"sprop_241_namePROP_TopDesignUnitsprop_241_val""sprop_242_namePROP_TopDesignUnitsprop_242_val""sprop_243_namePROP_TopDesignUnitsprop_243_val""sprop_244_namePROP_TopDesignUnitsprop_244_val""sprop_245_namePROP_TopDesignUnitsprop_245_val""sprop_246_namePROP_TopDesignUnitsprop_246_val""sprop_247_namePROP_TopDesignUnitsprop_247_val""sprop_248_namePROP_TopDesignUnitsprop_248_val""sprop_249_namePROP_TopDesignUnitsprop_249_val""sprop_24_namePROP_CompxlibOtherCompxlibOptssprop_24_val""sprop_250_namePROP_TopDesignUnitsprop_250_val""sprop_251_namePROP_TopDesignUnitsprop_251_val""sprop_252_namePROP_TopDesignUnitsprop_252_val""sprop_253_namePROP_TopDesignUnitsprop_253_val""sprop_254_namePROP_TopDesignUnitsprop_254_val""sprop_255_namePROP_TopDesignUnitsprop_255_val""sprop_256_namePROP_TopDesignUnitsprop_256_val""sprop_257_namePROP_TopDesignUnitsprop_257_val""sprop_258_namePROP_ISimIncreCompilationsprop_258_val"true"sprop_259_namePROP_ISimIncreCompilationsprop_259_val"true"sprop_25_namePROP_CompxlibSimPrimativessprop_25_val"true"sprop_260_namePROP_ISimIncreCompilationsprop_260_val"true"sprop_261_namePROP_ISimIncreCompilationsprop_261_val"true"sprop_262_namePROP_ISimIncreCompilationsprop_262_val"true"sprop_263_namePROP_ISimIncreCompilationsprop_263_val"true"sprop_264_namePROP_ISimIncreCompilationsprop_264_val"true"sprop_265_namePROP_ISimIncreCompilationsprop_265_val"true"sprop_266_namePROP_ISimIncreCompilationsprop_266_val"true"sprop_267_namePROP_ISimIncreCompilationsprop_267_val"true"sprop_268_namePROP_ISimIncreCompilationsprop_268_val"true"sprop_269_namePROP_ISimCompileForHdlDebugsprop_269_val"true"sprop_26_namePROP_SimModelGenerateTestbenchFilesprop_26_val"false"sprop_270_namePROP_ISimCompileForHdlDebugsprop_270_val"true"sprop_271_namePROP_ISimCompileForHdlDebugsprop_271_val"true"sprop_272_namePROP_ISimCompileForHdlDebugsprop_272_val"true"sprop_273_namePROP_ISimCompileForHdlDebugsprop_273_val"true"sprop_274_namePROP_ISimCompileForHdlDebugsprop_274_val"true"sprop_275_namePROP_ISimCompileForHdlDebugsprop_275_val"true"sprop_276_namePROP_ISimCompileForHdlDebugsprop_276_val"true"sprop_277_namePROP_ISimCompileForHdlDebugsprop_277_val"true"sprop_278_namePROP_ISimValueRangeChecksprop_278_val"false"sprop_279_namePROP_ISimValueRangeChecksprop_279_val"false"sprop_27_namePROP_SimModelInsertBuffersPulseSwallowsprop_27_val"false"sprop_280_namePROP_ISimValueRangeChecksprop_280_val"false"sprop_281_namePROP_ISimValueRangeChecksprop_281_val"false"sprop_282_namePROP_ISimValueRangeChecksprop_282_val"false"sprop_283_namePROP_ISimValueRangeChecksprop_283_val"false"sprop_284_namePROP_ISimValueRangeChecksprop_284_val"false"sprop_285_namePROP_ISimValueRangeChecksprop_285_val"false"sprop_286_namePROP_ISimValueRangeChecksprop_286_val"false"sprop_287_namePROP_ISimValueRangeChecksprop_287_val"false"sprop_288_namePROP_ISimValueRangeChecksprop_288_val"false"sprop_289_namePROP_ISimSpecifySearchDirectorysprop_289_val""sprop_28_namePROP_SimModelOtherNetgenOptssprop_28_val""sprop_290_namePROP_ISimSpecifySearchDirectorysprop_290_val""sprop_291_namePROP_ISimSpecifySearchDirectorysprop_291_val""sprop_292_namePROP_ISimSpecifySearchDirectorysprop_292_val""sprop_293_namePROP_ISimSpecifySearchDirectorysprop_293_val""
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