verilog除頻器可用於編碼段運(yùn)用可以穩(wěn)定電路設(shè)計(jì)
標(biāo)簽： verilog
上傳時(shí)間： 2013-12-26
上傳用戶：372825274
Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.
上傳時(shí)間： 2014-03-25
上傳用戶：yyyyyyyyyy
使用FPGA設(shè)計(jì)WiMax接收機(jī)之OFDM同步硬體電路(內(nèi)附VHDL code)
標(biāo)簽： WiMax FPGA OFDM VHDL
上傳時(shí)間： 2016-01-22
上傳用戶：zhuyibin
一個(gè)可以計(jì)算分壓電路的源碼。 可透過輸出與輸入電壓，計(jì)算電阻的大小；或透過輸入電壓與電阻，計(jì)算最後輸出之電壓
標(biāo)簽： 分
上傳時(shí)間： 2014-12-09
上傳用戶：hoperingcong
使用硬體描述語言HDL 設(shè)計(jì)硬體電路，臺(tái)灣人寫的PPT講義，非常不錯(cuò)。VHDL硬件設(shè)計(jì)入門學(xué)習(xí)。VHDL基本語法架構(gòu)，VHDL的零件庫(Library)及包裝(Package)等內(nèi)容。
標(biāo)簽： HDL
上傳時(shí)間： 2014-01-22
上傳用戶：cxl274287265
用於相位法激光測(cè)距的電路系統(tǒng)設(shè)計(jì)----
上傳時(shí)間： 2017-04-21
上傳用戶：dave520l
用電路圖所設(shè)計(jì)的counter 淺顯易懂~~~~
標(biāo)簽： counter
上傳時(shí)間： 2013-12-10
上傳用戶：2467478207
LVDS技術(shù)： 低電壓差分訊號(hào)(LVDS)在對(duì)訊號(hào)完整性、低抖動(dòng)及共模特性要求較高的系統(tǒng)中得到了廣泛的應(yīng)用。本文針對(duì)LVDS與其他幾種介面標(biāo)準(zhǔn)之間的連接，對(duì)幾種典型的LVDS介面電路進(jìn)行了討論
上傳時(shí)間： 2014-01-13
上傳用戶：stvnash
頻率計(jì)程序﹐一個(gè)基于PIC單片機(jī)的頻率計(jì)程序和電路圖。
上傳時(shí)間： 2013-12-26
上傳用戶：liansi
使用微機(jī)電 (MEMS) 設(shè)計(jì) Data Acquisition System
標(biāo)簽： Acquisition System MEMS Data
上傳時(shí)間： 2013-12-25
上傳用戶：二驅(qū)蚊器
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