PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
標簽： Architecture ExpressTM PCI
上傳時間： 2013-11-03
上傳用戶：gy592333
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2013-10-15
上傳用戶：busterman
PCI ExpressTM is the third generation of PCI (PeripheralComponent Interconnect) technology used to connect I/Operhipheral devices in computer systems. It is intended asa general purpose I/O device interconnect that meets theneeds of a wide variety of computing platforms such asdesktop, mobile, server and communications. It alsospecifies the electrical and mechanical attributes of thebackplane, connectors and removable cards in thesesystems.
上傳時間： 2013-11-17
上傳用戶：squershop
在深入分析了意法半導體公司推出的STM32、高速PCI總線以及運動控制卡的功能和結構特點的基礎上，設計了一款可直接插在PCI 插槽中的伺服運動控制卡。不僅可大大降低了成本，更為開放式數控系統的研究提供了一個全新的思路。結果表明，本文所設計的伺服控制卡滿足了目前控制系統的性能和要求。
上傳時間： 2014-12-25
上傳用戶：l銀幕海
詳細介紹了PCI9052接口器件的功能、結構和使用方法，并結合實際給出了基于PCI9052器件開發PCI總線接口卡的應用實例。 Abstract: The main functions,structures and usage of PCI9052inferface chip are introduced in detail in this paper.And an application example of designing PCI bus interface card based on PCI9052is proposed in this paper.
上傳時間： 2013-10-16
上傳用戶：togetsomething
PCI 9656是PLX公司設計的一款高速PCI I/O芯片，可應用于66MHz、64bit PCI和CompactPCI總線。文章簡述了PCI 9656的主要功能，介紹了一種應用PCI 9656的CompactPCI數據接收卡設計。設計中采用MAXII系列CPLD建立了PCI 9656與FIFO間的數據通道，可滿足高速數據傳輸的要求。
上傳時間： 2014-11-28
上傳用戶：1184599859
PCI總線是Pentium主機最常見的總線,基于PCI總線形成的CompactPCI和PXI總線廣泛地應用在儀器和自動化領域。PCI適配卡的接口設計變得越來越重要。本文對PCI專用接口電路PCI9052的功能進行了研究與分析,并給出了一個應用實例設計。
上傳時間： 2013-11-02
上傳用戶：unmwq
一、版權信息PCI-51XX系列智能CAN接口卡及相關軟件均屬廣州市周立功單片機發展有限公司所有，其產權受國家法律絕對保護，未經本公司授權，其他公司、單位、代理商及個人不得非法使用和拷貝，否則將受到國家法律的嚴厲制裁。您若需要我公司產品及相關信息，請及時與我們聯系，我們將熱情接待。廣州周立功單片機發展有限公司保留在任何時候修訂本用戶手冊且不需通知的權利。 二、功能特點PCI-51XX智能CAN接口卡是具有PCI接口的高性能CAN總線通訊適配卡，它使PC機方便地連接到CAN總線上，實現CAN2.0B協議的數據通訊。PCI-51XX智能CAN接口卡采用標準PCI接口，實現與主機PC的高速數據交換。接口卡上自帶光電隔離模塊，使PC機避免由于地環流的損壞，增強系統在惡劣環境中使用的可靠性。PCI-51XX智能CAN接口卡配有可在Win98/Me、Win2000/XP下工作的驅動程序，使用通用CAN接口庫，使開發簡單化，并包含在VC++、C++Builder、Delphi、VB下開發的詳細應用例程。
上傳時間： 2013-10-08
上傳用戶：wangyi39
關鍵詞 PCI的總線協議，數據傳輸摘 要本文檔介紹通過 Actel Flash 的FPGA 來實現PCI 的橋接芯片的功能
上傳時間： 2013-10-08
上傳用戶：kongrong
詳細闡述一種利用CPLD 實現的8 位單片機與PCI 設備間的通信接口方案，給出用ABEL HDL編寫的主要源程序。該方案在實踐中檢驗通過。
上傳時間： 2013-10-30
上傳用戶：yeling1919
