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time-delay Systems

  • MEMS 經(jīng)典教材

    The field of microelectromechanical systems (MEMS), particularly micromachinedmechanical transducers, has been expanding over recent years, and the productioncosts of these devices continue to fall. Using materials, fabrication processes, anddesign tools originally developed for the microelectronic circuits industry, newtypes of microengineered device are evolving all the time—many offering numerousadvantages over their traditional counterparts. The electrical properties of siliconhave been well understood for many years, but it is the mechanical properties thathave been exploited in many examples of MEMS. This book may seem slightlyunusual in that it has four editors. However, since we all work together in this fieldwithin the School of Electronics and Computer Science at the University of Southampton,it seemed natural to work together on a project like this. MEMS are nowappearing as part of the syllabus for both undergraduate and postgraduate coursesat many universities, and we hope that this book will complement the teaching thatis taking place in this area.

    標簽: MEMS 教材

    上傳時間: 2013-10-16

    上傳用戶:朗朗乾坤

  • lpc2292/lpc2294 pdf datasheet

    The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.

    標簽: lpc datasheet 2292 2294

    上傳時間: 2014-12-30

    上傳用戶:aysyzxzm

  • 快速跳頻通信系統(tǒng)同步技術研究

    同步技術是跳頻通信系統(tǒng)的關鍵技術之一,尤其是在快速跳頻通信系統(tǒng)中,常規(guī)跳頻通信通過同步字頭攜帶相關碼的方法來實現(xiàn)同步,但對于快跳頻來說,由于是一跳或者多跳傳輸一個調(diào)制符號,難以攜帶相關碼。對此引入雙跳頻圖案方法,提出了一種適用于快速跳頻通信系統(tǒng)的同步方案。采用短碼攜帶同步信息,克服了快速跳頻難以攜帶相關碼的困難。分析了同步性能,仿真結果表明該方案同步時間短、虛警概率低、捕獲概率高,同步性能可靠。 Abstract:  Synchronization is one of the key techniques to frequency-hopping communication system, especially in the fast frequency hopping communication system. In conventional frequency hopping communication systems, synchronization can be achieved by synchronization-head which can be used to carry the synchronization information, but for the fast frequency hopping, Because modulation symbol is transmitted by per hop or multi-hop, it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code, a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code, which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed, and simulation results show that the scheme has the advantages of shorter synchronization time, lower probability of false alarm, higher probability of capture and more reliable of synchronization.

    標簽: 快速跳頻 同步技術 通信系統(tǒng)

    上傳時間: 2013-11-23

    上傳用戶:mpquest

  • 采用TüV認證的FPGA開發(fā)功能安全系統(tǒng)

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標簽: FPGA 安全系統(tǒng)

    上傳時間: 2013-11-14

    上傳用戶:zoudejile

  • WP151 - Xilinx FPGA的System ACE配置解決方案

    Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.

    標簽: System Xilinx FPGA 151

    上傳時間: 2013-11-23

    上傳用戶:kangqiaoyibie

  • xilinx Zynq-7000 EPP產(chǎn)品簡介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    標簽: xilinx Zynq 7000 EPP

    上傳時間: 2013-10-09

    上傳用戶:evil

  • 能量收集系統(tǒng)的設計挑戰(zhàn)

    Modern electronic systems solve so many difficult problems that they often seem like magic. Nonetheless, these systems all have thesame basic limitation: they need a source of electrical power! Most of the time this is a straightforward challenge for the electronicdesigner, because there are many power-delivery solutions. Yet sometimes a device has no direct power source, and running wiresor replacing batteries is impractical. Even when long-life batteries are usable, they eventually need to be replaced, which requires aservice call.

    標簽: 能量收集

    上傳時間: 2015-01-03

    上傳用戶:zukfu

  • 16kb/s Low Delay CELP 算法

    16kb/s Low Delay CELP 算法

    標簽: Delay CELP Low 16

    上傳時間: 2015-01-03

    上傳用戶:huangld

  • Backpropagation Network Time-Series Forecasting 源碼, 經(jīng)典的BPN人工神經(jīng)網(wǎng)絡例子源碼

    Backpropagation Network Time-Series Forecasting 源碼, 經(jīng)典的BPN人工神經(jīng)網(wǎng)絡例子源碼

    標簽: Backpropagation Forecasting Time-Series Network

    上傳時間: 2015-01-05

    上傳用戶:tb_6877751

  • Unix和NT上NetWork Time網(wǎng)絡協(xié)議(4.0版本)

    Unix和NT上NetWork Time網(wǎng)絡協(xié)議(4.0版本)

    標簽: NetWork Unix Time 4.0

    上傳時間: 2014-01-01

    上傳用戶:鳳臨西北

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