In this paper we revisit hybrid analog-digital precoding systems with emphasis on their modelling
and radio-frequency (RF) losses, to realistically evaluate their benefits in 5G system implementations.
For this, we decompose the analog beamforming networks (ABFN) as a bank of commonly used RF
components and formulate realistic model constraints based on their S-parameters. Specifically, we
concentrate on fully-connected ABFN (FC-ABFN) and Butler networks for implementing the discrete
Fourier transform (DFT) in the RF domain. The results presented in this paper reveal that the performance
and energy efficiency of hybrid precoding systems are severely affected, once practical factors are
considered in the overall design. In this context, we also show that Butler RF networks are capable of
providing better performances than FC-ABFN for systems with a large number of RF chains.
Summary
Many control applications require converting some analog input to a digital format. The ADCINC12 User
Module is a general-purpose, 12-bit analog to digital converter (ADC) that does just that. This Application
Note is meant to be a simple introduction into its operation. The steps required to define, place, and write
software are presented. Examples are developed in both assembly and C.
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
Abstract: The DS4830 optical microcontroller's analog-to-digital converter (ADC) offset can change with temperature and gainselection. However, the DS4830 allows users to measure the ADC internal offset. The measured ADC offset is added to the ADCoffset register to nullify the offset error. This application note demonstrates the DS4830's ADC internal offset calibration in theapplication program.
詳細介紹了TLC1549系列模數轉換器的特點及工作原理，然后根據TLC1549的工作時序和A/D轉換原理針對實際問題編寫了詳細的匯編語言程序。
Abstract:
A basic principle and characteristic of TLC1549 analog-to-digital converter are introduced? detailedly in this article.Through engineering-oriented illustration,a microcomputer programmer base on basic principle and time sequence of TLC1549 is writted.
Luminary Micro provides an analog-to-digital converter (ADC) module on some members of theStellaris microcontroller family. The hardware resolution of the ADC is 10 bits; however, due to noiseand other accuracy-diminishing factors, the true accuracy is less than 10 bits. This application noteprovides a software-based oversampling technique, resulting in an improved Effective Number OfBits (ENOB) in the conversion result. This document describes methods of oversampling an inputsignal, and the impact on precision and overall system performance.
Luminary Micro Stellaris™ microcontrollers that are equipped with an analog-to-digital converter(ADC), use an innovative sequence-based sampling architecture designed to be extremely flexible,yet easy to use. This application note describes the sampling architecture of the ADC. Sinceprogrammers can configure Stellaris microcontrollers either through the powerful StellarisFamilyDriver Library or through direct writes to the device's control registers, this application note describesboth methods. The information presented in this document is intended to complement the ADCchapter of the device datasheet, and assumes the reader has a basic understanding of howADCsfunction.
