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ArithMEtic

ArithMEtic,英文單詞,名詞,作名詞時意為“算術,算法”。
  • Designand Analysisof Fast Text Compression Basedon Quasi-ArithMEtic Coding.

    Designand Analysisof Fast Text Compression Basedon Quasi-ArithMEtic Coding.

    標簽: Quasi-ArithMEtic Compression Analysisof Designand

    上傳時間: 2013-12-11

    上傳用戶:kelimu

  • Galois Field ArithMEtic algorithm

    Galois Field ArithMEtic algorithm

    標簽: ArithMEtic algorithm Galois Field

    上傳時間: 2014-12-21

    上傳用戶:685

  • 高效的CABAC解碼器設計及FPGA實現

    H.264/AVC是ITU與ISO/IEC(International Standard Organization/Intemational Electrotechnical Commission國際標準化組織/國際電工委員會)聯合推出的活動圖像編碼標準。作為最新的國際視頻編碼標準,H.264/AVC與MPEG-4、H.263等視頻編碼標準相比,性能有了很大提高,并已在流媒體、數字電視、電話會議、視頻存儲等諸多領域得到廣泛的應用。基于上下文的自適應二進制算術編碼(Conrext-based Adaptive Binary ArithMEtic Coding,CABAC)是H.264/AVC的兩個熵編碼方案之一,相對于另一熵編碼方案-CAVLC(基于上下文的自適應可變長編碼),CABAC具有更高的數據壓縮率:在同等編碼質量下要比CAVLC提高10%~15%的壓縮率。CABAC能實現很高的數據壓縮率,但這是以增加實現的復雜性為代價的。在已有的硬件實現方法上,CABAC的解碼效率并不高。 論文在深入研究CABAC解碼算法及其實現流程,并在仔細分析了H.264/AVC碼流結構的基礎上,總結出了影響CABAC解碼效率的各個環節,并以此為出發點,對CABAC解碼所需中的各個功能模塊進行了優化設計,設計出一種新的CABAC解碼器結構,相對于一般的CABAC解碼器,它的解碼效率得到了顯著提高。論文針對影響CABAC解碼過程的"瓶頸"問題一多次訪問存儲部件影響解碼速率,提出了新的存儲組織方式,并根據CABAC的碼流結構特性,采用4個子解碼器級聯的方式來進一步提高解碼速率。 最后,用Verilog語言對所設計的CABAC解碼器進行了描述,用EDA軟件對其進行了仿真,并在FPGA上驗證了其功能,結果顯示,該CABAC解碼器結構顯著提高了解碼效率,能夠滿足高檔次實時通訊的要求。

    標簽: CABAC FPGA 解碼器

    上傳時間: 2013-07-03

    上傳用戶:huazi

  • 如何提高模冪運算速度應用筆記

    Abstract: This application note describes how to improve the speed of modular exponentiation by more than 50% whenusing MAXQ® microcontrollers that have a modular ArithMEtic accelerator (MAA).  

    標簽: 如何提高 模冪運算 應用筆記 速度

    上傳時間: 2013-11-17

    上傳用戶:s363994250

  • 基于單DSP的VoIP模擬電話適配器研究與實現

    基于單DSP的VoIP模擬電話適配器研究與實現:提出和實現了一種新穎的基于單個通用數字信號處理器(DSP)的VoIP模擬電話適配器方案。DSP的I/O和存儲資源非常有限,通常適于運算密集型應用,不適宜控制密集型應用[5]。該系統高效利用單DSP的I/O和片內外存儲器資源,采用μC/OS-II嵌入式實時操作系統,支持SIP和TCP-UDP/IP協議,通過LAN或者寬帶接入,使普通電話機成為Internet終端,實現IP電話。該系統軟硬件結構緊湊高效,運行穩定,成本低,具有廣闊的應用前景。關鍵詞:模擬電話適配器;IP電話;數字信號處理器;μC/OS-II 【Abstract】This paper presents a VoIP ATA solution based on a single digital signal processor (DSP). DSPs are suitable for ArithMEtic-intensiveapplication and unsuitable for control-intensive application because of the limitation of I/O and memory resources. This solution is based on a 16-bitfixed-point DSP and μC/OS-II embedded real-time operating system. It makes good use of the limited resources, supports SIP and TCP-UDP/IPprotocol. It can connect the analog telephone to Internet and realize the VoIP application. This system has a great future for its high efficiency andlow cost.【Key words】Analog telephone adapter (ATA); Voice over Internet protocol (VoIP); Digital signal processor (DSP); μC/OS-II Research and Implementation of VoIPATA Based on Single DSP

    標簽: VoIP DSP 模擬電話 適配器

    上傳時間: 2013-11-20

    上傳用戶:Wwill

  • Nios II定制指令用戶指南

         Nios II定制指令用戶指南:With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequence of standard instructions to a single instruction implemented in hardware. You can use this feature for a variety of applications, for example, to optimize software inner loops for digital signal processing (DSP), packet header processing, and computation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphical user interface (GUI) used to add up to 256 custom instructions to the Nios II processor. The custom instruction logic connects directly to the Nios II ArithMEtic logic unit (ALU) as shown in Figure 1–1.

    標簽: Nios 定制 指令 用戶

    上傳時間: 2013-10-12

    上傳用戶:kang1923

  • 很好用的壓縮和解壓縮程序

    很好用的壓縮和解壓縮程序,ArithMEtic,請大家試用一下,多指教!

    標簽: 解壓 程序

    上傳時間: 2015-03-19

    上傳用戶:ruixue198909

  • In each step the LZSS algorithm sends either a character or a <position, length> pair. Among t

    In each step the LZSS algorithm sends either a character or a <position, length> pair. Among these, perhaps character "e" appears more frequently than "x", and a <position, length> pair of length 3 might be commoner than one of length 18, say. Thus, if we encode the more frequent in fewer bits and the less frequent in more bits, the total length of the encoded text will be diminished. This consideration suggests that we use Huffman or ArithMEtic coding, preferably of adaptive kind, along with LZSS.

    標簽: algorithm character position either

    上傳時間: 2014-01-27

    上傳用戶:wang0123456789

  • vhdl程序源代碼

    vhdl程序源代碼,包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC ArithMEtic

    標簽: vhdl 程序 源代碼

    上傳時間: 2013-12-26

    上傳用戶:363186

  • /* This program generates the DApkg.vhd file that is used to define * the DA filter core and give

    /* This program generates the DApkg.vhd file that is used to define * the DA filter core and gives its parameters and the contents of the * Distributed ArithMEtic Look-up-table "DALUT" according to the DA algorithm

    標簽: generates the program define

    上傳時間: 2015-07-07

    上傳用戶:wangchong

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