FLASH存儲器CMOS8M(1M 8/512K×16)BIT MBM29LV800TA-70/90/-12/MBM29LV800B
上傳時間： 2013-12-13
上傳用戶：waizhang
A novel Ka-band bandpass filter using LIGA micromachined proce
標簽： micromachined bandpass Ka-band filter
上傳時間： 2013-12-25
上傳用戶：宋桃子
bit operations 2007 version in C
標簽： operations version 2007 bit
上傳時間： 2016-06-06
上傳用戶：源碼3
bit led2=P2^5 // led2對應接在P2.5腳 sbit led3=P2^6 // led3對應接在P2.6腳 sbit led4=P2^7 // led4對應接在P2.7腳
上傳時間： 2016-06-07
上傳用戶：aysyzxzm
18 bit ADC FS511 C與ASM源代碼
上傳時間： 2016-06-18
上傳用戶：SimonQQ
Coaxial feed structures are widely used in ultra-wide band antennas . This paper modeled the characteristic of the monopole antenna feeded by coaxial line by FDTD in the time-domiain,which showes that . Firstly, it introduced the theory of the arithmetic and the particularly realization in the calculation then it described the use in the time-domain finally it analysed several characteristics of the monopole antenna. The arithmetic used in the microstrip antenna is also a quick and economical way to design the antenna.
標簽： structures ultra-wide antennas Coaxial
上傳時間： 2016-06-28
上傳用戶：朗朗乾坤
用哈夫曼編碼實現文件壓縮和解壓縮. 壓縮過程的實現：1創建Haffman樹 2打開需壓縮文件 3將需壓縮文件中的每個ascii碼對應的haffman編碼按bit單位輸出 4文件壓縮結束
標簽： 61664 Haffman haffman ascii
上傳時間： 2013-11-28
上傳用戶：zhichenglu
好用的日期轉換函數 Date/Time Routines to enhance your 32-bit Delphi Programming.
標簽： Programming Routines enhance Delphi
上傳時間： 2013-12-18
上傳用戶：hjshhyy
Atmel’s AT91SAM7FP105 is a low pincount FingerChip processor based on the 32-bit ARM RISC processor. It features a on-chip biometric engine performing enrollment verification and identification, an internal record cache of up to 25 records and a secure command protocol over USB, SPI, UART. This protocol enables an external host system or processor to control the onchip bioengine functions, manipulate the record cache, and securely export record cache records for external storage. Together with the FingerChip sensor device AT77C104B, it forms an embedded, secured biometric turnkey solution.
標簽： processor FingerChip pincount Atmel
上傳時間： 2013-12-26
上傳用戶：shawvi
SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core. Good luck
標簽： controller written NIOS2 using
上傳時間： 2016-08-12
上傳用戶：王楚楚
